loadpatents
name:-0.0083460807800293
name:-0.0071070194244385
name:-0.00046205520629883
Mojumder; Niladri Patent Filings

Mojumder; Niladri

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mojumder; Niladri.The latest application filed is for "circuits and methods providing core scheduling in response to aging for a multi-core processor".

Company Profile
0.7.7
  • Mojumder; Niladri - San Diego CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and apparatus for integrated circuit monitoring and prevention of electromigration failure
Grant 10,591,531 - Chandra , et al.
2020-03-17
Circuits and Methods Providing Core Scheduling in Response to Aging for a Multi-Core Processor
App 20180143853 - Saeidi; Mehdi ;   et al.
2018-05-24
Reduced height M1 metal lines for local on-chip routing
Grant 9,666,481 - Song , et al. May 30, 2
2017-05-30
Method And Apparatus For Integrated Circuit Monitoring And Prevention Of Electromigration Failure
App 20160363623 - CHANDRA; Rajit ;   et al.
2016-12-15
Reduced Height M1 Metal Lines For Local On-chip Routing
App 20160240437 - SONG; Stanley Seungchul ;   et al.
2016-08-18
Reduced height M1 metal lines for local on-chip routing
Grant 9,349,686 - Song , et al. May 24, 2
2016-05-24
Silicon germanium read port for a static random access memory register file
Grant 9,336,864 - Mojumder , et al. May 10, 2
2016-05-10
High density static random access memory array having advanced metal patterning
Grant 9,318,564 - Mojumder , et al. April 19, 2
2016-04-19
Silicon Germanium Read Port For A Static Random Access Memory Register File
App 20160064068 - Mojumder; Niladri ;   et al.
2016-03-03
High Density Static Random Access Memory Array Having Advanced Metal Patterning
App 20150333131 - MOJUMDER; Niladri ;   et al.
2015-11-19
Reduced Height M1 Metal Lines For Local On-chip Routing
App 20150262930 - SONG; Stanley Seungchul ;   et al.
2015-09-17
Priority based layout versus schematic (LVS)
Grant 8,966,418 - Mojumder , et al. February 24, 2
2015-02-24
Priority Based Layout Versus Schematic (lvs)
App 20140282330 - MOJUMDER; Niladri ;   et al.
2014-09-18

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed