| Patent | Date |
|---|
Processing systems and methods for molecular memory
Grant 7,799,598 - Kuhr , et al. September 21, 2 | 2010-09-21 |
Electronic junction devices featuring redox electrodes
Grant 7,737,433 - McCreery , et al. June 15, 2 | 2010-06-15 |
Method for hiding a refresh in a pseudo-static memory
Grant 7,688,662 - Mobley March 30, 2 | 2010-03-30 |
Enhanced DRAM with Embedded Registers
App 20090122619 - Sartore; Ronald H. ; et al. | 2009-05-14 |
Method and circuit for increasing the memory access speed of an enhanced synchronous memory
Grant 7,533,231 - Mobley , et al. May 12, 2 | 2009-05-12 |
Method for Hiding a Refresh in a Pseudo-Static Memory
App 20090073794 - Mobley; Kenneth J. | 2009-03-19 |
Method for hiding a refresh in a pseudo-static memory with plural DRAM sub-arrays and an on-board address decoder
Grant 7,453,752 - Mobley November 18, 2 | 2008-11-18 |
Processing Systems and Methods for Molecular Memory
App 20080219041 - Kuhr; Werner G. ; et al. | 2008-09-11 |
Enhanced DRAM with embedded registers
Grant 7,370,140 - Sartore , et al. May 6, 2 | 2008-05-06 |
Processing systems and methods for molecular memory
Grant 7,358,113 - Shrivastava , et al. April 15, 2 | 2008-04-15 |
Electronic Juction Devices Featuring Redox Electrodes
App 20070090348 - McCreery; Richard L. ; et al. | 2007-04-26 |
Method for hiding a refresh in a pseudo-static memory
Grant 7,085,186 - Mobley August 1, 2 | 2006-08-01 |
Processing systems and methods for molecular memory
App 20050270822 - Shrivastava, Ritu ; et al. | 2005-12-08 |
Method and circuit for increasing the memory access speed of an enhanced synchronous SDRAM
Grant 6,813,679 - Mobley , et al. November 2, 2 | 2004-11-02 |
Method and circuit for increasing the memory access speed of an enhanced synchronous SDRAM
App 20030236958 - Mobley, Kenneth J. ; et al. | 2003-12-25 |
Structure and method for hiding DRAM cycle time behind a burst access
Grant 6,501,698 - Mobley December 31, 2 | 2002-12-31 |
Method for hiding a refresh in a pseudo-static memory
App 20020147885 - Mobley, Kenneth J. | 2002-10-10 |
Enhanced dram with embedded registers
App 20020056020 - Sartore, Ronald H. ; et al. | 2002-05-09 |
Enhanced DRAM with embedded registers
Grant 6,347,357 - Sartore , et al. February 12, 2 | 2002-02-12 |
Cached synchronous DRAM architecture having a mode register programmable cache policy
Grant 6,289,413 - Rogers , et al. September 11, 2 | 2001-09-11 |
Technique for reducing element disable fuse pitch requirements in an integrated circuit device incorporating replaceable circuit elements
Grant 6,141,281 - Mobley , et al. October 31, 2 | 2000-10-31 |
Enhanced signal processing random access memory device utilizing a DRAM memory array integrated with an associated SRAM cache and internal refresh control
Grant 5,991,851 - Alwais , et al. November 23, 1 | 1999-11-23 |
Enhanced DRAM with embedded registers
Grant 5,887,272 - Sartore , et al. March 23, 1 | 1999-03-23 |
Enhanced DRAM with single row SRAM cache for all device read operations
Grant 5,721,862 - Sartore , et al. February 24, 1 | 1998-02-24 |
Enhanced DRAM with all reads from on-chip cache and all writers to memory array
Grant 5,699,317 - Sartore , et al. December 16, 1 | 1997-12-16 |
Self-timed bootstrap decoder
Grant 5,327,026 - Hardee , et al. July 5, 1 | 1994-07-05 |
Low-to-high voltage translator with latch-up immunity
Grant 5,321,324 - Hardee , et al. June 14, 1 | 1994-06-14 |
Current supply circuit for driving high capacitance load in an integrated circuit
Grant 5,134,310 - Mobley , et al. July 28, 1 | 1992-07-28 |
Non-volatile memory cell and sensing method
Grant 4,888,733 - Mobley December 19, 1 | 1989-12-19 |
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