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name:-0.0079600811004639
name:-0.0012249946594238
MIYASHITA; Moriya Patent Filings

MIYASHITA; Moriya

Patent Applications and Registrations

Patent applications and USPTO patent grants for MIYASHITA; Moriya.The latest application filed is for "method for producing three-dimensional structure, method for producing vertical transistor, vertical transistor wafer, and vertical transistor substrate".

Company Profile
1.8.4
  • MIYASHITA; Moriya - Kitakanbara-gun JP
  • Miyashita; Moriya - Yokohama JP
  • Miyashita; Moriya - Yokohama-shi JP
  • Miyashita; Moriya - Yokkaichi JP
  • Miyashita; Moriya - Kitakami JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method For Producing Three-dimensional Structure, Method For Producing Vertical Transistor, Vertical Transistor Wafer, And Vertical Transistor Substrate
App 20220093396 - KAMIJO; Kazutaka ;   et al.
2022-03-24
Method For Producing Three-dimensional Structure, Method For Producing Vertical Transistor, Vertical Transistor Wafer, And Verti
App 20200211840 - KAMIJO; Kazutaka ;   et al.
2020-07-02
Semiconductor wafer with ID mark, equipment for and method of manufacturing semiconductor device from them
Grant 7,700,381 - Arikado , et al. April 20, 2
2010-04-20
Semiconductor wafer with ID mark, equipment for and method of manufacturing semiconductor device from them
App 20060131696 - Arikado; Tsunetoshi ;   et al.
2006-06-22
Semiconductor wafer with ID mark, equipment for and method of manufacturing semiconductor device from them
Grant 7,057,259 - Arikado , et al. June 6, 2
2006-06-06
Semiconductor wafer with ID mark, equipment for and method of manufacturing semiconductor device from them
App 20030003608 - Arikado, Tsunetoshi ;   et al.
2003-01-02
Semiconductor substrate and method for producing the same
Grant 6,222,252 - Numano , et al. April 24, 2
2001-04-24
Manufacturing method of semiconductor substrate and inspection method therefor
Grant 5,951,755 - Miyashita , et al. September 14, 1
1999-09-14
Method and apparatus for detecting defect on semiconductor substrate surface
Grant 5,271,796 - Miyashita , et al. December 21, 1
1993-12-21
Wafer processsing method for manufacturing wafers having contaminant-gettering damage on one surface
Grant 5,071,776 - Matsushita , et al. * December 10, 1
1991-12-10
Gettering method for a semiconductor wafer
Grant 4,980,300 - Miyashita , et al. December 25, 1
1990-12-25
Gettering method for semiconductor wafers
Grant 4,971,920 - Miyashita , et al. November 20, 1
1990-11-20

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