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name:-0.0067770481109619
name:-0.1226749420166
name:-0.0010559558868408
Miyashita; Hirofumi Patent Filings

Miyashita; Hirofumi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Miyashita; Hirofumi.The latest application filed is for "printed board, display device, and method of manufacturing the display device".

Company Profile
0.6.5
  • Miyashita; Hirofumi - Tokyo JP
  • Miyashita; Hirofumi - Osaka JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Current limiting circuit, display device, and current limiting method
Grant 10,553,155 - Nakatani , et al. Fe
2020-02-04
Printed board, display device, and method of manufacturing the display device
Grant 10,426,033 - Miyashita Sept
2019-09-24
Printed Board, Display Device, And Method Of Manufacturing The Display Device
App 20190124769 - MIYASHITA; Hirofumi
2019-04-25
Current Limiting Circuit, Display Device, And Current Limiting Method
App 20190051240 - NAKATANI; Toshikuni ;   et al.
2019-02-14
Interconnect structure of semiconductor integrated circuit and semiconductor device including the same
Grant 8,487,423 - Matsumura , et al. July 16, 2
2013-07-16
Interconnect Structure Of Semiconductor Integrated Circuit And Semiconductor Device Including The Same
App 20110260333 - MATSUMURA; Yoichi ;   et al.
2011-10-27
Interconnect structure of semiconductor integrated circuit, and design method and device therefor
Grant 7,913,221 - Miyashita , et al. March 22, 2
2011-03-22
Method for designing semiconductor integrated circuits having air gaps.
Grant 7,698,671 - Fujii , et al. April 13, 2
2010-04-13
Method And Program For Designing Semiconductor Integrated Circuit, Method And Program For Supporting Design Of Semiconductor Integrated Circuit, And Method And Program For Calculating Wiring Parasitic Capacitance
App 20080120583 - Fujii; Tsutomu ;   et al.
2008-05-22
Interconnect structure of semiconductor integrated circuit, and design method and device therefor
App 20080097641 - Miyashita; Hirofumi ;   et al.
2008-04-24

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