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Patent applications and USPTO patent grants for Miyanishi; Isamu.The latest application filed is for "semiconductor integrated circuit and clock supply method".
Patent | Date |
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Semiconductor integrated circuit and clock supply method including a sample and hold circuit Grant 11,009,905 - Miyanishi , et al. May 18, 2 | 2021-05-18 |
Semiconductor Integrated Circuit And Clock Supply Method App 20190272003 - Miyanishi; Isamu ;   et al. | 2019-09-05 |
Solid-state imaging device and method for producing the same Grant 10,163,739 - Miyanishi , et al. Dec | 2018-12-25 |
Solid-state Imaging Device And Method For Producing The Same App 20170263513 - MIYANISHI; Isamu ;   et al. | 2017-09-14 |
Sampling clock generator circuit, and image reader and electronic device incorporating the same Grant 8,957,720 - Miyanishi , et al. February 17, 2 | 2015-02-17 |
Sampling Clock Generator Circuit, And Image Reader And Electronic Device Incorporating The Same App 20140002170 - Miyanishi; Isamu ;   et al. | 2014-01-02 |
Method and apparatus for communications interfacing capable of effectively reducing disk drive power consumption App 20040186939 - Miyanishi, Isamu ;   et al. | 2004-09-23 |
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