Mitsumoto; Kinya
Patent Applications and Registrations
Patent applications and USPTO patent grants for Mitsumoto; Kinya.The latest application filed is for "semiconductor integrated circuit".
- Mitsumoto; Kinya - Tamamura JP
- Mitsumoto; Kinya - Tmamura JP
- Mitsumoto; Kinya - Tamamura-machi JP
- Mitsumoto; Kinya - Tanamura-machi JP
- Mitsumoto; Kinya - Tamamuramachi JP
- Mitsumoto; Kinya - Koganei JP
- Mitsumoto; Kinya - Tokyo JP
| Patent | Date |
|---|---|
| Semiconductor device Grant 7,623,397 - Itano , et al. November 24, 2 | 2009-11-24 |
| Synchronization circuit and synchronization method Grant 7,397,880 - Mitsumoto July 8, 2 | 2008-07-08 |
| Semiconductor integrated circuit App 20070188208 - Mitsumoto; Kinya | 2007-08-16 |
| Semiconductor memory device Grant 7,254,068 - Ueno , et al. August 7, 2 | 2007-08-07 |
| Semiconductor device Grant 7,196,424 - Itano , et al. March 27, 2 | 2007-03-27 |
| Semiconductor device App 20060284296 - Itano; Noriyuki ; et al. | 2006-12-21 |
| Semiconductor memory device App 20060158918 - Ueno; Hiroki ; et al. | 2006-07-20 |
| Semiconductor integrated circuit App 20060145266 - Zushi; Hirofumi ; et al. | 2006-07-06 |
| Semiconductor memory device Grant 7,068,551 - Ueno , et al. June 27, 2 | 2006-06-27 |
| Synchronization circuit and synchronization method App 20050232386 - Mitsumoto, Kinya | 2005-10-20 |
| Synchronization circuit and synchronization method Grant 6,909,312 - Mitsumoto June 21, 2 | 2005-06-21 |
| Semiconductor memory device App 20050128839 - Ueno, Hiroki ; et al. | 2005-06-16 |
| Semiconductor device App 20050104175 - Itano, Noriyuki ; et al. | 2005-05-19 |
| Semiconductor integrated circuit App 20050104642 - Mitsumoto, Kinya | 2005-05-19 |
| Semiconductor memory device Grant 6,856,559 - Ueno , et al. February 15, 2 | 2005-02-15 |
| Synchronization circuit and synchronization method App 20040222831 - Mitsumoto, Kinya | 2004-11-11 |
| Semiconductor device and method of manufacturing a semiconductor device Grant 6,770,941 - Shinozaki , et al. August 3, 2 | 2004-08-03 |
| Semiconductor memory device having a double data rate (DDR) mode and utilizing a plurality of comparison circuits to prevent errors due to a late write function Grant 6,725,325 - Nishiyama , et al. April 20, 2 | 2004-04-20 |
| Semiconductor memory device App 20040027896 - Ueno, Hiroki ; et al. | 2004-02-12 |
| Semiconductor memory device Grant 6,625,070 - Ueno , et al. September 23, 2 | 2003-09-23 |
| Semiconductor device and method of manufacturing a semiconductor device App 20020074572 - Shinozaki, Masao ; et al. | 2002-06-20 |
| Semiconductor memory device App 20020075732 - Ueno, Hiroki ; et al. | 2002-06-20 |
| Semiconductor memory device and data processing system having semiconductor memory device App 20020071332 - Nishiyama, Masahiko ; et al. | 2002-06-13 |
| Semiconductor memory device and sense circuit Grant 5,734,616 - Kazama , et al. March 31, 1 | 1998-03-31 |
| High-speed semiconductor memory device and data processing system using the same Grant 5,654,931 - Tamba , et al. August 5, 1 | 1997-08-05 |
| Semiconductor device Grant 5,638,335 - Akiyama , et al. June 10, 1 | 1997-06-10 |
| Semiconductor memory with multiple sets & redundant cells Grant 5,392,246 - Akiyama , et al. February 21, 1 | 1995-02-21 |
| Memory device with improved common data line bias arrangement Grant 5,050,127 - Mitsumoto , et al. * September 17, 1 | 1991-09-17 |
| Semiconductor device for a ram disposed on chip so as to minimize distances of signal paths between the logic circuits and memory circuit Grant 5,014,242 - Akimoto , et al. May 7, 1 | 1991-05-07 |
| Memory device with improved common data line bias arrangement Grant 4,829,479 - Mitsumoto , et al. May 9, 1 | 1989-05-09 |
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