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name:-0.015526056289673
name:-0.0017440319061279
Mitric; Krste Patent Filings

Mitric; Krste

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mitric; Krste.The latest application filed is for "time-to-digital converter with phase-scaled course-fine resolution".

Company Profile
1.14.13
  • Mitric; Krste - Ottawa CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Circuit and method for generating temperature-stable clocks using ordinary oscillators
Grant 10,992,301 - Mitric , et al. April 27, 2
2021-04-27
Time-to-digital converter with phase-scaled course-fine resolution
Grant 10,007,235 - Wang , et al. June 26, 2
2018-06-26
PLL system with master and slave devices
Grant 10,007,639 - Mitric , et al. June 26, 2
2018-06-26
Time-to-digital Converter With Phase-scaled Course-fine Resolution
App 20180088535 - Wang; Tuoxin ;   et al.
2018-03-29
Hardware delay compensation in digital phase locked loop
Grant 9,667,237 - Jin , et al. May 30, 2
2017-05-30
Apparatus for generating clock signals having a PLL part and synthesizer part with programmable output dividers
Grant 9,647,674 - Schram , et al. May 9, 2
2017-05-09
Phase locked loop with jump-free holdover mode
Grant 9,634,675 - Schram , et al. April 25, 2
2017-04-25
Phase locked loop with accurate alignment among output clocks
Grant 9,584,138 - Mitric , et al. February 28, 2
2017-02-28
Phase Locked Loop with Accurate Alignment among Output Clocks
App 20160301417 - Mitric; Krste ;   et al.
2016-10-13
Apparatus for Generating Clock Signals having a PLL part and Synthesizer Part with Programmable Output Dividers
App 20160301419 - Schram; Paul H.L.M. ;   et al.
2016-10-13
Pll System With Master And Slave Devices
App 20160299870 - Mitric; Krste ;   et al.
2016-10-13
Phase Locked Loop with Jump-Free Holdover Mode
App 20160294399 - Schram; Paul H.L.M. ;   et al.
2016-10-06
Hardware Delay Compensation in Digital Phase Locked Loop
App 20160294401 - Jin; Qu Gary ;   et al.
2016-10-06
Phase locked loop with the ability to accurately apply phase offset corrections while maintaining the loop filter characteristics
Grant 9,094,185 - Schram , et al. July 28, 2
2015-07-28
Phase Locked Loop with the Ability to Accurately Apply Phase Offset Corrections While Maintaining the Loop Filter Characteristics
App 20150207619 - SCHRAM; Paul H.L.M. ;   et al.
2015-07-23
Phase locked loop with precise phase and frequency slope limiter
Grant 8,957,711 - Jin , et al. February 17, 2
2015-02-17
Phase locked loop with simultaneous locking to low and high frequency clocks
Grant 8,907,706 - Mitric , et al. December 9, 2
2014-12-09
Phase Locked Loop With Precise Phase And Frequency Slope Limiter
App 20140320186 - Jin; Q. Gary ;   et al.
2014-10-30
Phase Locked Loop With Simultaneous Locking To Low And High Frequency Clocks
App 20140320181 - Mitric; Krste ;   et al.
2014-10-30
Digital FM radio transmitter
Grant 8,090,316 - Milijevic , et al. January 3, 2
2012-01-03
Digitally controlled oscillator with jitter shaping capability
Grant 7,548,119 - Mitric , et al. June 16, 2
2009-06-16
Digital Fm Radio Transmitter
App 20090081969 - Milijevic; Slobodan ;   et al.
2009-03-26
Digitally Controlled Oscillator With Jitter Shaping Capability
App 20070262822 - Mitric; Krste ;   et al.
2007-11-15
Digital phase-locked loop with master-slave modes
Grant 7,242,740 - Spijker , et al. July 10, 2
2007-07-10
Digital phase locked loop with selectable normal or fast-locking capability
Grant 7,126,429 - Mitric October 24, 2
2006-10-24
Digital phase locked loop with selectable normal or fast-locking capability
App 20050258908 - Mitric, Krste
2005-11-24
Digital Phase-Locked Loop with Master-Slave Modes
App 20040208256 - Spijker, Menno Tjeerd ;   et al.
2004-10-21

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