Mishra; Shiv Kumar

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mishra; Shiv Kumar.The latest application filed is for "dual trench isolation structures".

Company Profile

6.8.9

Mishra; Shiv Kumar - Mechanicville NY
Mishra; Shiv Kumar - Clifton Park NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Dual trench isolation structures Grant 11,239,315 - Mishra , et al. February 1, 2	2022-02-01
Source/drain regions for transistor devices and methods of forming same Grant 11,094,822 - Malinowski , et al. August 17, 2	2021-08-17
Dual Trench Isolation Structures App 20210242306 - MISHRA; Shiv Kumar ; et al.	2021-08-05
Novel Source/drain Regions For Transistor Devices And Methods Of Forming Same App 20210234045 - Malinowski; Arkadiusz ; et al.	2021-07-29
Diode Structures App 20210066450 - SINGH; Jagar ; et al.	2021-03-04
Diode structures Grant 10,896,953 - Singh , et al. January 19, 2	2021-01-19
Diode Structures App 20200328272 - SINGH; Jagar ; et al.	2020-10-15
Double barrier layer sets for contacts in semiconductor device Grant 10,453,747 - Kumar , et al. Oc	2019-10-22
Bipolar semiconductor device with silicon alloy region in silicon well and method for making Grant 10,236,367 - Singh , et al.	2019-03-19
Double Barrier Layer Sets For Contacts In Semiconductor Device App 20190067098 - Kumar; Aditya ; et al.	2019-02-28
Bipolar Semiconductor Device With Silicon Alloy Region In Silicon Well And Method For Making App 20190013397 - Singh; Jagar ; et al.	2019-01-10
Field Effect Semiconductor Device With Silicon Alloy Region In Silicon Well And Method For Making App 20190013402 - Singh; Jagar ; et al.	2019-01-10
Low resistance conductive contacts Grant 10,084,093 - Mishra , et al. September 25, 2	2018-09-25
Source/drain profile engineering for enhanced p-MOSFET Grant 9,419,082 - Mishra , et al. August 16, 2	2016-08-16
Field effect transistor (FinFET) device with a planar block area to enable variable Fin pitch and width Grant 9,236,269 - Kozarsky , et al. January 12, 2	2016-01-12
Field Effect Transistor (finfet) Device With A Planar Block Area To Enable Varialble Fin Pitch And Width App 20150311085 - Kozarsky; Eric S. ; et al.	2015-10-29
Source/drain Profile Engineering For Enhanced P-mosfet App 20150311293 - MISHRA; Shiv Kumar ; et al.	2015-10-29

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