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name:-0.0065138339996338
name:-0.0090270042419434
name:-0.004612922668457
Minagawa; Shuji Patent Filings

Minagawa; Shuji

Patent Applications and Registrations

Patent applications and USPTO patent grants for Minagawa; Shuji.The latest application filed is for "three-dimensional memory device having double-width staircase regions and methods of manufacturing the same".

Company Profile
4.7.5
  • Minagawa; Shuji - Yokkaichi JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Three-dimensional memory device having double-width staircase regions and methods of manufacturing the same
Grant 10,615,172 - Nagata , et al.
2020-04-07
Three-dimensional Memory Device Having Double-width Staircase Regions And Methods Of Manufacturing The Same
App 20190348435 - Nagata; Koichiro ;   et al.
2019-11-14
Three-dimensional memory device having on-pitch drain select gate electrodes and method of making the same
Grant 10,403,639 - Orimoto , et al. Sep
2019-09-03
Three-dimensional memory device employing discrete backside openings and methods of making the same
Grant 10,347,654 - Iwai , et al. July 9, 2
2019-07-09
Three-dimensional Memory Device Having On-pitch Drain Select Gate Electrodes And Method Of Making The Same
App 20190027489 - ORIMOTO; Takashi ;   et al.
2019-01-24
Three-dimensional memory device with leakage reducing support pillar structures and method of making thereof
Grant 10,014,316 - Yu , et al. July 3, 2
2018-07-03
Three-dimensional Memory Device With Leakage Reducing Support Pillar Structures And Method Of Making Thereof
App 20180108671 - YU; Fabo ;   et al.
2018-04-19
Epitaxial source region for uniform threshold voltage of vertical transistors in 3D memory devices
Grant 9,911,748 - Nishikawa , et al. March 6, 2
2018-03-06
Epitaxial Source Region For Uniform Threshold Voltage Of Vertical Transistors In 3d Memory Devices
App 20170092654 - NISHIKAWA; Masatoshi ;   et al.
2017-03-30
Method of suppressing epitaxial growth in support openings and three-dimensional memory device containing non-epitaxial support pillars in the support openings
Grant 9,576,967 - Kimura , et al. February 21, 2
2017-02-21
Vertical Nand Device Containing Peripheral Devices On Epitaxial Semiconductor Pedestal
App 20160111436 - DING; Hao ;   et al.
2016-04-21
Vertical NAND device containing peripheral devices on epitaxial semiconductor pedestal
Grant 9,305,934 - Ding , et al. April 5, 2
2016-04-05

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