Min; Byoung W.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Min; Byoung W..The latest application filed is for "selective gate oxide properties adjustment using fluorine".

Company Profile

0.30.29

Min; Byoung W. - Austin TX
Min; Byoung W. - Hopewell Junction NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Selective gate oxide properties adjustment using fluorine Grant 9,299,856 - Min March 29, 2	2016-03-29
Integrated split gate non-volatile memory cell and logic structure Grant 9,082,650 - Perera , et al. July 14, 2	2015-07-14
Selective Gate Oxide Properties Adjustment Using Fluorine App 20150179821 - MIN; BYOUNG W.	2015-06-25
Replacement-gate-compatible programmable electrical antifuse Grant 9,059,006 - Chakravarti , et al. June 16, 2	2015-06-16
Selective gate oxide properties adjustment using fluorine Grant 8,975,143 - Min March 10, 2	2015-03-10
Integrated Split Gate Non-volatile Memory Cell And Logic Structure App 20150054049 - PERERA; Asanga H. ; et al.	2015-02-26
Non-volatile memory (NVM) and high-K and metal gate integration using gate-last methodology Grant 8,901,632 - Perera , et al. December 2, 2	2014-12-02
Selective Gate Oxide Properties Adjustment Using Fluorine App 20140319596 - Min; Byoung W.	2014-10-30
Effective eFuse structure Grant 8,294,239 - Min October 23, 2	2012-10-23
Replacement-gate-compatible Programmable Electrical Antifuse App 20120249160 - Chakravarti; Satya N. ; et al.	2012-10-04
Replacement-gate-compatible programmable electrical antifuse Grant 8,237,457 - Chakravarti , et al. August 7, 2	2012-08-07
Integrated circuit using FinFETs and having a static random access memory (SRAM) Grant 8,088,657 - Burnett , et al. January 3, 2	2012-01-03
SOI semiconductor device with body contact and method thereof Grant 7,927,934 - Min , et al. April 19, 2	2011-04-19
Replacement-gate-compatible Programmable Electrical Antifuse App 20110012629 - Chakravarti; Satya N. ; et al.	2011-01-20
Method of forming a transistor having multiple types of Schottky junctions Grant 7,858,505 - Min December 28, 2	2010-12-28
Efficient body contact field effect transistor with reduced body resistance Grant 7,820,530 - Min , et al. October 26, 2	2010-10-26
Integrated Circuit Using Finfets And Having A Static Random Access Memory (sram) App 20100230762 - Burnett; James D. ; et al.	2010-09-16
Integrated circuit using FinFETs and having a static random access memory (SRAM) Grant 7,754,560 - Burnett , et al. July 13, 2	2010-07-13
Process for forming an electronic device including a fin-type structure Grant 7,709,303 - Burnett , et al. May 4, 2	2010-05-04
Efficient Body Contact Field Effect Transistor with Reduced Body Resistance App 20100081239 - Min; Byoung W. ; et al.	2010-04-01
eFuse and Resistor Structures and Method for Forming Same in Active Region App 20100078727 - Min; Byoung W. ; et al.	2010-04-01
Effective Efuse Structure App 20100072571 - Min; Byoung W.	2010-03-25
Semiconductor device with integrated resistive element and method of making Grant 7,648,884 - Min , et al. January 19, 2	2010-01-19
Area diode formation in SOI application Grant 7,517,742 - Min , et al. April 14, 2	2009-04-14
Multiple Device Types Including An Inverted-t Channel Transistor And Method Therefor App 20090039418 - Min; Byoung W. ; et al.	2009-02-12
Multiple device types including an inverted-T channel transistor and method therefor Grant 7,452,768 - Min , et al. November 18, 2	2008-11-18
Method Of Forming A Transistor Having Multiple Types Of Schottky Junctions App 20080274601 - Min; Byoung W.	2008-11-06
Soi Semiconductor Device With Body Contact And Method Thereof App 20080254586 - Min; Byoung W. ; et al.	2008-10-16
Semiconductor Device With Integrated Resistive Element And Method Of Making App 20080206939 - Min; Byoung W. ; et al.	2008-08-28
Methodology to reduce SOI floating-body effect Grant 7,410,876 - Min , et al. August 12, 2	2008-08-12
Process for forming an electronic device including a fin-type structure App 20070161171 - Burnett; James D. ; et al.	2007-07-12
Integrated circuit using FinFETs and having a static random access memory (SRAM) App 20070158730 - Burnett; James D. ; et al.	2007-07-12
Multiple device types including an inverted-T channel transistor and method therefor App 20070093054 - Min; Byoung W. ; et al.	2007-04-26
Vertical diode formation in SOI application Grant 7,186,596 - Min , et al. March 6, 2	2007-03-06
Area diode formation in SOI application App 20060284278 - Min; Byoung W. ; et al.	2006-12-21
Vertical diode formation in SOI application App 20060284260 - Min; Byoung W. ; et al.	2006-12-21
Method of forming a semiconductor device and structure thereof Grant 7,144,784 - Min , et al. December 5, 2	2006-12-05
Semiconductor device including a transistor and a capacitor having an aligned transistor and capacitive element Grant 7,122,421 - Sanchez , et al. October 17, 2	2006-10-17
Separately strained N-channel and P-channel transistors Grant 7,041,576 - Pozder , et al. May 9, 2	2006-05-09
Method for converting a planar transistor design to a vertical double gate transistor design Grant 7,013,447 - Mathew , et al. March 14, 2	2006-03-14
Method of forming a semiconductor device and structure thereof App 20060024893 - Min; Byoung W. ; et al.	2006-02-02
Backside body contact App 20050280088 - Min, Byoung W. ; et al.	2005-12-22
Separately strained N-channel and P-channel transistors App 20050275017 - Pozder, Scott K. ; et al.	2005-12-15
Semiconductor device having an aligned transistor and capacitive element App 20050167782 - Sanchez, Hector ; et al.	2005-08-04
Semiconductor device having electrical contact from opposite sides including a via with an end formed at a bottom surface of the diffusion region Grant 6,921,961 - Sanchez , et al. July 26, 2	2005-07-26
Semiconductor device having electrical contact from opposite sides App 20050042867 - Sanchez, Hector ; et al.	2005-02-24
Method for converting a planar transistor design to a vertical double gate transistor design App 20050020015 - Mathew, Leo ; et al.	2005-01-27
Substrate contact in SOI and method therefor Grant 6,844,224 - Min January 18, 2	2005-01-18
Method for forming a semiconductor device having electrical contact from opposite sides Grant 6,838,332 - Sanchez , et al. January 4, 2	2005-01-04
Body-tied silicon on insulator semiconductor device and method therefor Grant 6,724,048 - Min , et al. April 20, 2	2004-04-20
Body-tied silicon on insulator semiconductor device and method therefor App 20030211663 - Min, Byoung W. ; et al.	2003-11-13
Method of forming body-tied silicon on insulator semiconductor device Grant 6,620,656 - Min , et al. September 16, 2	2003-09-16
Body-tied Silicon On Insulator Semiconductor Device And Method Therefor App 20030113959 - Min, Byoung W. ; et al.	2003-06-19
Substrate contact in SOI and method therefor App 20030089948 - Min, Byoung W.	2003-05-15

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