loadpatents
name:-0.0091030597686768
name:-0.0058689117431641
name:-0.0037879943847656
Min; Byoung-jun Patent Filings

Min; Byoung-jun

Patent Applications and Registrations

Patent applications and USPTO patent grants for Min; Byoung-jun.The latest application filed is for "semiconductor test apparatus".

Company Profile
0.5.6
  • Min; Byoung-jun - Asan-si KR
  • Min; Byoung-jun - Chungcheongnam KR
  • Min, Byoung-Jun - Cheonan-city KR
  • Min; Byoung-jun - Ahsan KR
  • MIN, BYOUNG JUN - CHUNGCHEONGNAM-DO KR
  • Min, Byoung-jun - Ahsan-city KR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor test apparatus
Grant 10,120,016 - Lee , et al. November 6, 2
2018-11-06
Semiconductor Test Apparatus
App 20170102427 - LEE; Dong-young ;   et al.
2017-04-13
Contact Structure For A Test Handler, Test Handler Having The Contact Structure And Method Of Testing Integrated Circuit Devices Using The Test Handler
App 20160061884 - CHO; Jung-Hyun ;   et al.
2016-03-03
Test socket, and test apparatus with test socket to control a temperature of an object to be tested
Grant 8,564,317 - Han , et al. October 22, 2
2013-10-22
Test kit for semiconductor package and method for testing semiconductor package using the same
Grant 7,017,428 - Min , et al. March 28, 2
2006-03-28
Integrated monitoring burn-in test method for multi-chip package
App 20040145387 - Yun, Geum-Jin ;   et al.
2004-07-29
Test kit for semiconductor package and method for testing semiconductor package using the same
App 20040112142 - Min, Byoung-Jun ;   et al.
2004-06-17
Semiconductor package testing equipment including loader having package guider and method of loading a semiconductor package onto a test socket as aligned therewith
Grant 6,462,534 - Kang , et al. October 8, 2
2002-10-08
Socket, Circuit Board, And Sub-circuit Board For Semiconductor Integrated Circuit Device
App 20020037672 - MIN, BYOUNG JUN ;   et al.
2002-03-28
Semiconductor package testing equipment including loader having package guider and method of loading a semiconductor package onto a test socket as aligned therewith
App 20010026152 - Kang, Seong-goo ;   et al.
2001-10-04

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed