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Private Memory Management using Utility Thread
App 20220050790 - Goodman; Benjiman L. ; et al. | 2022-02-17 |
Queuing system for register file access
Grant 9,330,432 - Havlir , et al. May 3, 2 | 2016-05-03 |
Queuing System For Register File Access
App 20150049106 - Havlir; Andrew M. ; et al. | 2015-02-19 |
Translation lookaside buffer structure including an output comparator
Grant 8,949,573 - McCombs , et al. February 3, 2 | 2015-02-03 |
Queue arbitration using non-stalling request indication
Grant 8,793,421 - Miller , et al. July 29, 2 | 2014-07-29 |
Physical organization of memory to reduce power consumption
Grant 8,570,827 - Sullivan , et al. October 29, 2 | 2013-10-29 |
Late-select, address-dependent sense amplifier
Grant 8,472,267 - Tanpure , et al. June 25, 2 | 2013-06-25 |
Low-power High-speed Data Buffer
App 20130117476 - Miller; William V. ; et al. | 2013-05-09 |
Queue Arbitration Using Non-stalling Request Indication
App 20130111090 - Miller; William V. ; et al. | 2013-05-02 |
Collision prevention in a dual port memory
Grant 8,432,756 - Sullivan , et al. April 30, 2 | 2013-04-30 |
Collision Prevention In A Dual Port Memory
App 20130094313 - Sullivan; Steven C. ; et al. | 2013-04-18 |
Physical Organization Of Memory To Reduce Power Consumption
App 20120155210 - Sullivan; Steven C. ; et al. | 2012-06-21 |
Late-select, Address-dependent Sense Amplifier
App 20120159076 - Tanpure; Abhijeet R. ; et al. | 2012-06-21 |
Translation Lookaside Buffer Structure Including an Output Comparator
App 20120124328 - McCombs; Edward M. ; et al. | 2012-05-17 |
Partial cache way locking
Grant 7,676,632 - Miller March 9, 2 | 2010-03-09 |
Microprocessor and method of processing instructions for responding to interrupt condition
Grant 7,594,103 - Patchen , et al. September 22, 2 | 2009-09-22 |
Systems and method for improved data retrieval from memory on behalf of bus masters
Grant 7,555,609 - Duncan , et al. June 30, 2 | 2009-06-30 |
Dynamically synchronizing a processor clock with the leading edge of a bus clock
Grant 7,496,779 - Miller February 24, 2 | 2009-02-24 |
Systems and Method for Improved Data Retrieval from Memory on Behalf of Bus Masters
App 20080104327 - Duncan; Richard ; et al. | 2008-05-01 |
Simultaneous Transmissions Between Multiple Master Buses and Multiple Slave Buses
App 20080046619 - Miller; William V. | 2008-02-21 |
Systems and Methods for Transactions Between Processor and Memory
App 20080034146 - Duncan; Richard ; et al. | 2008-02-07 |
Partial Cache Way Locking
App 20080022046 - Miller; William V. | 2008-01-24 |
Dynamically synchronizing a processor clock with the leading edge of a bus clock
App 20070288786 - Miller; William V. | 2007-12-13 |
Multiple master buses and slave buses transmitting simultaneously
Grant 7,305,510 - Miller December 4, 2 | 2007-12-04 |
System for idling a processor pipeline wherein the fetch stage comprises a multiplexer for outputting NOP that forwards an idle signal through the pipeline
Grant 7,266,708 - Miller September 4, 2 | 2007-09-04 |
System and method for handling state change conditions by a program status register
Grant 7,210,051 - Patchen , et al. April 24, 2 | 2007-04-24 |
Tag array access reduction in a cache memory
Grant 7,143,243 - Miller November 28, 2 | 2006-11-28 |
Updating instruction fault status register
App 20060168485 - Jusufovic; Zihno ; et al. | 2006-07-27 |
Accessible buffer for use in parallel with a filling cacheline
App 20060129762 - Miller; William V. | 2006-06-15 |
Idling a processor pipeline
App 20060080560 - Miller; William V. | 2006-04-13 |
Apparatus and method for assuming mastership of a bus
Grant 7,000,131 - Miller , et al. February 14, 2 | 2006-02-14 |
Processor and method for pre-fetching out-of-order instructions
Grant 6,983,359 - Miller January 3, 2 | 2006-01-03 |
Internal bus system
App 20050289268 - Miller, William V. | 2005-12-29 |
Apparatus and method for assuming mastership of a bus
App 20050108455 - Miller, William V. ; et al. | 2005-05-19 |
System and method for handling state change conditions by a program status register
App 20050102546 - Patchen, Paul J. ; et al. | 2005-05-12 |
Processor and method for pre-fetching out-of-order instructions
App 20050038976 - Miller, William V. | 2005-02-17 |
Multiple asynchronous switching system
Grant 6,842,052 - Miller January 11, 2 | 2005-01-11 |
Tag array access reduction in a cache memory
App 20040243764 - Miller, William V. | 2004-12-02 |
Multiple asynchronous switching system
App 20030227300 - Miller, William V. | 2003-12-11 |
Integrated circuit with multiple functions sharing multiple internal signal buses according to distributed bus access and control arbitration
Grant 5,774,684 - Haines , et al. June 30, 1 | 1998-06-30 |
Reflexively sizing memory bus interface
Grant 5,553,244 - Norcross , et al. September 3, 1 | 1996-09-03 |
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