Miller; Darrin C.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Miller; Darrin C..The latest application filed is for "low power parallelization to multiple output bus widths".
- Miller; Darrin C. - Fort Collins CO
- Miller, Darrin C. - Charlotte NC
| Patent | Date |
|---|---|
| Low power parallelization to multiple output bus widths Grant 9,767,062 - Miller , et al. September 19, 2 | 2017-09-19 |
| Low Power Parallelization To Multiple Output Bus Widths App 20160306765 - Miller; Darrin C. ; et al. | 2016-10-20 |
| System and Method For Adaptive N-Phase Clock Generation For An N-Phase Receiver App 20140362962 - Meier; Peter J. ; et al. | 2014-12-11 |
| Modal PAM2/PAM4 Divide By N (Div-N) Automatic Correlation Engine (ACE) For A Receiver App 20140355658 - Meier; Peter J. ; et al. | 2014-12-04 |
| System and method for high speed data parallelization for an N-phase receiver Grant 8,902,091 - Miller , et al. December 2, 2 | 2014-12-02 |
| Method and apparatus for low latency distribution of logic signals Grant 6,703,869 - Miller , et al. March 9, 2 | 2004-03-09 |
| Method and apparatus for low latency distribution of logic signals App 20030227298 - Miller, Darrin C. ; et al. | 2003-12-11 |
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