Mii; Yuh-Jier

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mii; Yuh-Jier.The latest application filed is for "transistorless memory cell".

Company Profile

1.27.22

Mii; Yuh-Jier - Hsin-Chu TW
Mii; Yuh-Jier - Hsinchu TW
Mii; Yuh-Jier - Taipei TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Transistorless Memory Cell App 20210366529 - Chiang; Katherine ; et al.	2021-11-25
Transistorless memory cell Grant 11,094,361 - Chiang , et al. August 17, 2	2021-08-17
Transistorless Memory Cell App 20200075074 - Chiang; Katherine ; et al.	2020-03-05
Semiconductor structure having an air-gap region and a method of manufacturing the same Grant 10,361,152 - Su , et al.	2019-07-23
Method and apparatus of forming a via Grant 9,496,217 - Tsai , et al. November 15, 2	2016-11-15
Controlling Gate Formation for High Density Cell Layout App 20150318367 - Chuang; Harry Hak-Lay ; et al.	2015-11-05
Method and system for bonding 3D semiconductor device Grant 9,123,553 - Liu , et al. September 1, 2	2015-09-01
Semiconductor Structure Having An Air-gap Region And A Method Of Manufacturing The Same App 20150200160 - SU; Shu-Hui ; et al.	2015-07-16
Semiconductor structure having an air-gap region and a method of manufacturing the same Grant 8,999,839 - Su , et al. April 7, 2	2015-04-07
Method of making a semiconductor device including barrier layers for copper interconnect Grant 8,975,749 - Liu , et al. March 10, 2	2015-03-10
Method Of Making A Semiconductor Device Including Barrier Layers For Copper Interconnect App 20140127898 - LIU; Nai-Wei ; et al.	2014-05-08
Method and apparatus for improving gate contact Grant 8,680,597 - Chuang , et al. March 25, 2	2014-03-25
Barrier layers for copper interconnect Grant 8,653,664 - Liu , et al. February 18, 2	2014-02-18
Method and Apparatus for Improving Gate Contact App 20130328134 - Chuang; Harry-Hak-Lay ; et al.	2013-12-12
Semiconductor Structure Having An Air-gap Region And A Method Of Manufacturing The Same App 20130252144 - SU; Shu-Hui ; et al.	2013-09-26
Method and apparatus for improving gate contact Grant 8,524,570 - Chuang , et al. September 3, 2	2013-09-03
Semiconductor structure having an air-gap region and a method of manufacturing the same Grant 8,456,009 - Su , et al. June 4, 2	2013-06-04
Partial air gap formation for providing interconnect isolation in integrated circuits Grant 8,304,906 - Huang , et al. November 6, 2	2012-11-06
Methods and apparatus for SRAM bit cell with low standby current, low supply voltage and high speed Grant 8,294,212 - Wang , et al. October 23, 2	2012-10-23
Contact implement structure for high density design Grant 8,217,469 - Hou , et al. July 10, 2	2012-07-10
Method And Apparatus For Improving Gate Contact App 20120074498 - Chuang; Harry Hak-Lay ; et al.	2012-03-29
Accurate capacitance measurement for ultra large scale integrated circuits Grant 8,115,500 - Doong , et al. February 14, 2	2012-02-14
Method and System for Bonding 3D Semiconductor Device App 20120028441 - Liu; Chung-Shi ; et al.	2012-02-02
Partial Air Gap Formation For Providing Interconnect Isolation In Integrated Circuits App 20110291281 - Huang; Cheng-Lin ; et al.	2011-12-01
Method and system for bonding 3D semiconductor devices Grant 8,048,717 - Liu , et al. November 1, 2	2011-11-01
Accurate Capacitance Measurement for Ultra Large Scale Integrated Circuits App 20110168995 - Doong; Yih-Yuh ; et al.	2011-07-14
Novel Contact Implement Structure For High Density Design App 20110140203 - Hou; Yung-Chin ; et al.	2011-06-16
Methods and Apparatus for SRAM Bit Cell with Low Standby Current, Low Supply Voltage and High Speed App 20110068400 - Wang; Ping-Wei ; et al.	2011-03-24
Accurate capacitance measurement for ultra large scale integrated circuits Grant 7,880,494 - Doong , et al. February 1, 2	2011-02-01
Barrier Layers For Copper Interconnect App 20110006429 - LIU; Nai-Wei ; et al.	2011-01-13
Method And Apparatus Of Forming A Via App 20100308469 - Tsai; Hsin-Yi ; et al.	2010-12-09
Read-preferred SRAM cell design Grant 7,826,252 - Wang , et al. November 2, 2	2010-11-02
Accurate capacitance measurement for ultra large scale integrated circuits Grant 7,772,868 - Doong , et al. August 10, 2	2010-08-10
Accurate Capacitance Measurement for Ultra Large Scale Integrated Circuits App 20100156453 - Doong; Yih-Yuh ; et al.	2010-06-24
Accurate Capacitance Measurement for Ultra Large Scale Integrated Circuits App 20090002012 - Doong; Yih-Yuh ; et al.	2009-01-01
Method and system for bonding 3D semiconductor devices App 20080268573 - Liu; Chung-Shi ; et al.	2008-10-30
Read-preferred SRAM cell design Grant 7,436,696 - Wang , et al. October 14, 2	2008-10-14
Formation process of interconnect structures with air-gaps and sidewall spacers App 20080185722 - Liu; Chung-Shi ; et al.	2008-08-07
Circuit and method for an SRAM with reduced power consumption Grant 7,359,272 - Wang , et al. April 15, 2	2008-04-15
Circuit For An Sram With Reduced Power Consumption App 20080043561 - Wang; Ping-Wei ; et al.	2008-02-21
Read-preferred SRAM cell design App 20070253239 - Wang; Ping-Wei ; et al.	2007-11-01
Bond pad structure for integrated circuit chip App 20060091566 - Yang; Chin-Tien ; et al.	2006-05-04
Test site and a method of monitoring via etch depths for semiconductor devices Grant 5,900,644 - Ying , et al. May 4, 1	1999-05-04
Test site and a method of monitoring via etch depths for semiconductor devices Grant 5,702,956 - Ying , et al. December 30, 1	1997-12-30

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