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Patent applications and USPTO patent grants for Merryman; Kenneth E..The latest application filed is for "method and apparatus for selectively providing hierarchy to a circuit design".
Patent | Date |
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Method and apparatus for selectively providing hierarchy to a circuit design Grant 6,718,520 - Merryman , et al. April 6, 2 | 2004-04-06 |
Spreadsheet driven I/O buffer synthesis process Grant 6,708,144 - Merryman , et al. March 16, 2 | 2004-03-16 |
Method and apparatus for incremntally optimizing a circuit design Grant 6,026,220 - Cleereman , et al. February 15, 2 | 2000-02-15 |
Method and apparatus for optimizing a gated clock structure using a standard optimization tool Grant 5,980,092 - Merryman , et al. November 9, 1 | 1999-11-09 |
Method and apparatus for providing optimization parameters to a logic optimizer tool Grant 5,960,184 - Cleereman , et al. September 28, 1 | 1999-09-28 |
Method and apparatus for monitoring the performance of a circuit optimization tool Grant 5,940,604 - Merryman , et al. August 17, 1 | 1999-08-17 |
Method and apparatus for identifying gated clocks within a circuit design using a standard optimization tool Grant 5,864,487 - Merryman , et al. January 26, 1 | 1999-01-26 |
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