Merchant; Steven L.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Merchant; Steven L..The latest application filed is for "isolation trench with rounded corners for bicmos process".

Company Profile

0.22.12

Merchant; Steven L. - Amherst NH
Merchant; Steven L. - Bedford NH
Merchant; Steven L. - Milford NH
Merchant; Steven L. - Phoenix AZ
Merchant; Steven L. - Yorktown Heights NY
Merchant; Steven L. - Yorktown Hgts. NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Isolation trench with rounded corners for BiCMOS process Grant 8,274,131 - Pendharkar , et al. September 25, 2	2012-09-25
ISOLATION TRENCH WITH ROUNDED CORNERS FOR BiCMOS PROCESS App 20110073955 - Pendharkar; Sameer P. ; et al.	2011-03-31
Distributed high voltage JFET Grant 7,910,417 - Hower , et al. March 22, 2	2011-03-22
Isolation trench with rounded corners for BiCMOS process Grant 7,846,789 - Pendharkar , et al. December 7, 2	2010-12-07
High voltage depletion FET employing a channel stopping implant Grant 7,736,961 - Merchant , et al. June 15, 2	2010-06-15
Distributed high voltage JFET Grant 7,605,412 - Hower , et al. October 20, 2	2009-10-20
ISOLATION TRENCH WITH ROUNDED CORNERS FOR BiCMOS PROCESS App 20090096033 - Pendharkar; Sameer P. ; et al.	2009-04-16
Distributed High Voltage Jfet App 20080299716 - Hower; Philip L. ; et al.	2008-12-04
Distributed high voltage JFET Grant 7,417,270 - Hower , et al. August 26, 2	2008-08-26
Distributed power MOSFET Grant 7,187,034 - Hower , et al. March 6, 2	2007-03-06
Distributed High Voltage Jfet App 20070012958 - Hower; Philip L. ; et al.	2007-01-18
High voltage depletion FET employing a channel stopping implant App 20060292771 - Merchant; Steven L. ; et al.	2006-12-28
Distributed high voltage JFET App 20050285157 - Hower, Philip L. ; et al.	2005-12-29
Distributed power MOSFET App 20040256669 - Hower, Philip L. ; et al.	2004-12-23
Bladed silicon-on-insulator semiconductor devices and method of making App 20040222485 - Haynie, Sheldon D. ; et al.	2004-11-11
Segmented power MOSFET of safe operation Grant 6,815,276 - Hower , et al. November 9, 2	2004-11-09
Bladed silicon-on-insulator semiconductor devices and method of making Grant 6,800,917 - Haynie , et al. October 5, 2	2004-10-05
Bladed silicon-on-insulator semiconductor devices and method of making Grant 6,797,547 - Haynie , et al. September 28, 2	2004-09-28
Bladed silicon-on-insulator semiconductor devices and method of making App 20040129976 - Haynie, Sheldon D. ; et al.	2004-07-08
Bladed silicon-on-insulator semiconductor devices and method of making App 20040113223 - Haynie, Sheldon D. ; et al.	2004-06-17
Distributed power MOSFET App 20040067617 - Hower, Philip L. ; et al.	2004-04-08
Double-diffused MOS (DMOS) power transistor with a channel compensating implant Grant 6,700,160 - Merchant March 2, 2	2004-03-02
Field effect transistor having differing power dissipation across an array of transistors Grant 6,603,157 - Dupuy , et al. August 5, 2	2003-08-05
Field effect transistor and method of making App 20020036329 - Dupuy, Phillipe ; et al.	2002-03-28
Semiconductor device and method of making Grant 6,150,200 - Merchant November 21, 2	2000-11-21
Method of changing the power dissipation across an array of transistors Grant 6,140,184 - Dupuy , et al. October 31, 2	2000-10-31
High-voltage lateral MOSFET SOI device having a semiconductor linkup region Grant 5,710,451 - Merchant January 20, 1	1998-01-20
Lateral thin-film SOI devices with linearly-graded field oxide and linear doping profile Grant 5,648,671 - Merchant July 15, 1	1997-07-15
Method for making an improved high voltage thin film transistor having a linear doping profile Grant 5,412,241 - Merchant May 2, 1	1995-05-02
SOI transistor with improved source-high performance Grant 5,362,979 - Merchant November 8, 1	1994-11-08
High voltage thin film transistor having a linear doping profile and method for making Grant 5,300,448 - Merchant , et al. April 5, 1	1994-04-05
Method for making an improved high voltage thin film transistor having a linear doping profile Grant 5,246,870 - Merchant September 21, 1	1993-09-21
Process for making thin film silicon-on-insulator wafers employing wafer bonding and wafer thinning Grant 5,213,986 - Pinker , et al. May 25, 1	1993-05-25
Integrated circuit device particularly adapted for high voltage applications Grant 5,113,236 - Arnold , et al. May 12, 1	1992-05-12

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