loadpatents
name:-0.2723069190979
name:-0.054213047027588
name:-0.00053191184997559
Mei; Len Patent Filings

Mei; Len

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mei; Len.The latest application filed is for "nonvolatile memories with laterally recessed charge-trapping dielectric".

Company Profile
0.7.12
  • Mei; Len - San Jose CA
  • Mei, Len - Milpitas CA
  • Mei; Len - Hsinchu TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Non-volatile memory devices with charge storage regions
Grant 8,125,020 - He , et al. February 28, 2
2012-02-28
Nonvolatile Memories With Laterally Recessed Charge-trapping Dielectric
App 20100323511 - He; Yue-Song ;   et al.
2010-12-23
Nonvolatile memories with laterally recessed charge-trapping dielectric
Grant 7,816,726 - He , et al. October 19, 2
2010-10-19
Integrated circuits with substrate protrusions, including (but not limited to) floating gate memories
Grant 7,808,032 - He , et al. October 5, 2
2010-10-05
Nonvolatile Memory With Floating Gates With Upward Protrusions
App 20090321806 - Mei; Len ;   et al.
2009-12-31
Method For Making Very Small Isolated Dots On Substrates
App 20090256221 - Mei; Len ;   et al.
2009-10-15
Nonvolatile Memory Arrays With Charge Trapping Dielectric And With Non-dielectric Nanodots
App 20090251972 - He; Yue-Song ;   et al.
2009-10-08
Split-gate non-volatile memory devices having nitride tunneling layers
App 20090184359 - He; Yue-Song ;   et al.
2009-07-23
Nonvolatile Memories With Laterally Recessed Charge-trapping Dielectric
App 20090159957 - He; Yue-Song ;   et al.
2009-06-25
Memory Devices With Split Gate And Blocking Layer
App 20090101961 - He; Yue-Song ;   et al.
2009-04-23
Non-volatile Memory Devices With Charge Storage Regions
App 20090096013 - He; Yue-Song ;   et al.
2009-04-16
NAND-type Flash Array with Reduced Inter-cell Coupling Resistance
App 20090085069 - MEI; Len ;   et al.
2009-04-02
Integrated circuits with substrate protrusions, including (but not limited to) floating gate memories
Grant 7,452,776 - He , et al. November 18, 2
2008-11-18
Integrated Circuits With Substrate Protrusions, Including (but Not Limited To) Floating Gate Memories
App 20080266949 - He; Yue-Song ;   et al.
2008-10-30
Integrated Circuits With Substrate Protrusions, Including (but Not Limited To) Floating Gate Memories
App 20080265305 - He; Yue-Song ;   et al.
2008-10-30
[physical Vapor Deposition Process And Apparatus Therefor]
App 20050205411 - Chen, Tai-Yuan ;   et al.
2005-09-22
Technique to improve deep trench capacitance by increasing surface thereof
Grant 6,495,411 - Mei December 17, 2
2002-12-17
Technique of bottle-shaped deep trench formation
Grant 6,232,171 - Mei May 15, 2
2001-05-15
Method and apparatus for endpoint detection for chemical mechanical polishing using electrical lapping
Grant 6,007,405 - Mei December 28, 1
1999-12-28

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