Mehrotra; Deepak

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mehrotra; Deepak.The latest application filed is for "real time formative assessment and lesson plan recommendation with remedial learning assessment".

Company Profile

2.10.4

Mehrotra; Deepak - Bangalore Karnataka
Mehrotra; Deepak - Thousand Oaks CA
Mehrotra; Deepak - Walnut Creek CA
Mehrotra; Deepak - Milpitas CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Real Time Formative Assessment and Lesson Plan Recommendation With Remedial Learning Assessment App 20210201688 - Agarwal; Varsha ; et al.	2021-07-01
Network-Based Systems for Analysis-Based Authentication and Monetization App 20200043574 - Mehrotra; Deepak ; et al.	2020-02-06
Network-Based Verification Systems and Methods App 20190293564 - Mehrotra; Deepak ; et al.	2019-09-26
Reversible sheets and pillowcases App 20070028383 - Mehrotra; Deepak	2007-02-08
Integrated tunable high efficiency power amplifier Grant 6,232,841 - Bartlett , et al. May 15, 2	2001-05-15
Trimmable singleband and tunable multiband integrated oscillator using micro-electromechanical system (MEMS) technology Grant 6,232,847 - Marcy, 5th , et al. May 15, 2	2001-05-15
Frequency synthesizer using micro electro mechanical systems (MEMS) technology and method Grant 6,094,102 - Chang , et al. July 25, 2	2000-07-25
Integrated passive transceiver section Grant 6,049,702 - Tham , et al. April 11, 2	2000-04-11
Tunable-trimmable micro electro mechanical system (MEMS) capacitor Grant 5,959,516 - Chang , et al. September 28, 1	1999-09-28
Monolithically integrated switched capacitor bank using micro electro mechanical system (MEMS) technology Grant 5,880,921 - Tham , et al. March 9, 1	1999-03-09
Integrated tunable inductance network and method Grant 5,872,489 - Chang , et al. February 16, 1	1999-02-16
Integrated variable gain power amplifier and method Grant 5,834,975 - Bartlett , et al. November 10, 1	1998-11-10
Configurable logic gate array Grant 4,527,115 - Mehrotra , et al. July 2, 1	1985-07-02
Semiconductor device fabrication process Grant 4,512,076 - Mehrotra , et al. April 23, 1	1985-04-23

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