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name:-0.034292936325073
name:-0.058736801147461
name:-0.001317024230957
MEGURO; Satoshi Patent Filings

MEGURO; Satoshi

Patent Applications and Registrations

Patent applications and USPTO patent grants for MEGURO; Satoshi.The latest application filed is for "arithmetic model generation system, wear amount estimation system, and arithmetic model generation method".

Company Profile
0.48.10
  • MEGURO; Satoshi - Hyogo JP
  • Meguro; Satoshi - Tokyo JP
  • Meguro; Satoshi - Hinode-machi JP
  • Meguro; Satoshi - Hinode JP
  • Meguro; Satoshi - Hinoda-machi JP
  • Meguro; Satoshi - Hionde-machi JP
  • Meguro; Satoshi - Hirai Hinode-machi JP
  • Meguro; Satoshi - Kodaira JP
  • Meguro; Satoshi - Hinodemachi JP
  • Meguro; Satoshi - Nishitama JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Arithmetic Model Generation System, Wear Amount Estimation System, And Arithmetic Model Generation Method
App 20210402829 - ISHIZAKA; Nobuyoshi ;   et al.
2021-12-30
Semiconductor Integrated Circuit Device Having Single-element Type Non-volatile Memory Elements
App 20080254582 - KOMORI; Kazuhiro ;   et al.
2008-10-16
Method of manufacturing a semiconductor integrated circuit device having single-element type non-volatile memory elements
Grant 7,399,667 - Komori , et al. July 15, 2
2008-07-15
Semiconductor integrated circuit device having single-element type non-volatile memory elements
App 20060172482 - Komori; Kazuhiro ;   et al.
2006-08-03
Semiconductor integrated circuit device having single-element type non-volatile memory elements
Grant 7,071,050 - Komori , et al. July 4, 2
2006-07-04
Semiconductor integrated circuit device having single-element type non-volatile memory elements
App 20060014347 - Komori; Kazuhiro ;   et al.
2006-01-19
Method of manufacturing a semiconductor memory device having a non-volatile memory cell portion with single misfet transistor type memory cells and a peripheral circuit portion with misfets
Grant 6,960,501 - Komori , et al. November 1, 2
2005-11-01
Semiconductor integrated circuit device and method of fabricating the same
Grant 6,838,374 - Uenishi , et al. January 4, 2
2005-01-04
Semiconductor integrated circuit device having single-element type non-volatile memory elements
App 20040191979 - Komori, Kazuhiro ;   et al.
2004-09-30
Method of manufacturing a semiconductor memory device having a memory cell portion including MISFETs with a floating gate and a peripheral circuit portion with MISFETs
Grant 6,777,282 - Komori , et al. August 17, 2
2004-08-17
Semiconductor integrated circuit device and method of fabricating the same
App 20030003644 - Uenishi, Toshiya ;   et al.
2003-01-02
Semiconductor integrated circuit device having single-element type non-volatile memory elements
App 20020179963 - Komori, Kazuhiro ;   et al.
2002-12-05
Method of manufacturing a semiconductor device having non-volatile memory cell portion with single transistor type memory cells and peripheral portion with MISFETs
Grant 6,451,643 - Komori , et al. September 17, 2
2002-09-17
Semiconductor integrated circuit device having single-element type non-volatile memory elements
App 20010038119 - Komori, Kazuhiro ;   et al.
2001-11-08
Semiconductor memory device having driver and load MISFETs and capacitor elements
Grant 6,307,217 - Ikeda , et al. October 23, 2
2001-10-23
Semiconductor integrated circuit device
App 20010023965 - Ikeda, Shuji ;   et al.
2001-09-27
Magnetic head having separated upper magnetic cores for avoiding magnetic saturation and manufacturing method of same
App 20010015872 - Meguro, Satoshi ;   et al.
2001-08-23
Method of manufacturing a semiconductor IC device having single transistor type nonvolatile memory cells
Grant 5,904,518 - Komori , et al. May 18, 1
1999-05-18
SRAM having load transistor formed above driver transistor
Grant 5,834,851 - Ikeda , et al. November 10, 1
1998-11-10
Process for fabricating a semiconductor integrated circuit device
Grant 5,731,219 - Ikeda , et al. March 24, 1
1998-03-24
Semiconductor integrated circuit device
Grant 5,700,705 - Meguro , et al. December 23, 1
1997-12-23
Process for fabricating a semiconductor integrated circuit device
Grant 5,700,704 - Ikeda , et al. December 23, 1
1997-12-23
Semiconductor integrated circuit device and process for fabricating the same
Grant 5,656,836 - Ikeda , et al. August 12, 1
1997-08-12
Semiconductor integrated circuit device having single-element type nonvolatile memory elements
Grant 5,656,839 - Komori , et al. August 12, 1
1997-08-12
Method of manufacturing a semiconductor integrated circuit device having single-element type non-volatile memory elements
Grant 5,656,522 - Komori , et al. August 12, 1
1997-08-12
Semiconductor integrated circuit device and process for fabricating the same
Grant 5,652,457 - Ikeda , et al. July 29, 1
1997-07-29
Semiconductor memory device constituted by single transistor type non-volatile cells and facilitated for both electrical erasing and writing of data
Grant 5,629,541 - Komori , et al. May 13, 1
1997-05-13
Semiconductor integrated circuit device
Grant 5,619,055 - Meguro , et al. April 8, 1
1997-04-08
Semiconductor integrated circuit device and method of manufacturing the same
Grant 5,602,048 - Komori , et al. February 11, 1
1997-02-11
Semiconductor integrated circuit device and process for fabricating the same
Grant 5,572,480 - Ikeda , et al. November 5, 1
1996-11-05
Semiconductor integrated circuit device
Grant 5,483,083 - Meguro , et al. January 9, 1
1996-01-09
Method of manufacturing a semiconductor device
Grant 5,472,891 - Komori , et al. December 5, 1
1995-12-05
Method of making semiconductor integrated circuit device having single-element type non-volatile memory elements
Grant 5,407,853 - Komori , et al. April 18, 1
1995-04-18
Method of manufacturing EEPROM memory device
Grant 5,340,760 - Komori , et al. August 23, 1
1994-08-23
Semiconductor integrated circuit device having single-element type non-volatile memory elements
Grant 5,300,802 - Komori , et al. April 5, 1
1994-04-05
SRAM with dual word lines overlapping drive transistor gates
Grant 5,239,196 - Ikeda , et al. August 24, 1
1993-08-24
Semiconductor integrated circuit device
Grant 5,194,749 - Meguro , et al. March 16, 1
1993-03-16
Semiconductor memory device
Grant 5,189,497 - Komori , et al. * February 23, 1
1993-02-23
Reference voltage generator device
Grant 5,159,260 - Yoh , et al. October 27, 1
1992-10-27
Semiconductor integrated circuit device and method of testing the same
Grant 5,155,701 - Komori , et al. October 13, 1
1992-10-13
Semiconductor memory device having first and second selecting lines for accessing memory cells
Grant 5,122,857 - Ikeda , et al. June 16, 1
1992-06-16
Semiconductor memory device
Grant 5,079,603 - Komori , et al. January 7, 1
1992-01-07
Semiconductor memory devices having stacked polycrystalline silicon transistors
Grant 5,034,797 - Yamanaka , et al. July 23, 1
1991-07-23
Semiconductor memory device
Grant 4,972,371 - Komori , et al. November 20, 1
1990-11-20
Semiconductor memory cell device with thick insulative layer
Grant 4,890,148 - Ikeda , et al. December 26, 1
1989-12-26
Static random-access memory having multilevel conductive layer
Grant 4,853,894 - Yamanaka , et al. August 1, 1
1989-08-01
Semiconductor memory device
Grant 4,841,481 - Ikeda , et al. June 20, 1
1989-06-20
Process of fabricating silicon oxide and gettering films on polycrystalline silicon resistance element
Grant 4,828,629 - Ikeda , et al. May 9, 1
1989-05-09
Read-only memory
Grant 4,805,143 - Matsumoto , et al. February 14, 1
1989-02-14
Recrystallized CMOS with different crystal planes
Grant 4,768,076 - Aoki , et al. August 30, 1
1988-08-30
Fabricating semiconductor devices to prevent alloy spiking
Grant 4,734,383 - Ikeda , et al. March 29, 1
1988-03-29
Process for fabricating semiconductor integrated circuit device
Grant 4,637,124 - Okuyama , et al. January 20, 1
1987-01-20
Method of manufacturing a reference voltage generator device
Grant 4,559,694 - Yoh , et al. December 24, 1
1985-12-24
Method for manufacturing complementary insulated gate field effect transistors
Grant RE31,079 - Nagasawa , et al. November 16, 1
1982-11-16
Method of manufacturing high voltage MIS type semiconductor device
Grant 4,285,116 - Meguro August 25, 1
1981-08-25
Method of fabricating a semiconductor device having channel stoppers
Grant 4,268,321 - Meguro May 19, 1
1981-05-19
Interconnection structure for semiconductor integrated circuits
Grant 4,199,778 - Masuhara , et al. April 22, 1
1980-04-22
Method for manufacturing complementary insulated gate field effect transistors
Grant 4,110,899 - Nagasawa , et al. September 5, 1
1978-09-05

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