Mednick; Kenneth
Patent Applications and Registrations
Patent applications and USPTO patent grants for Mednick; Kenneth.The latest application filed is for "ic layout physical verification method".
- Mednick; Kenneth - San Jose CA
| Patent | Date |
|---|---|
| Method and system for implementing parallel processing of electronic design automation tools Grant 7,904,852 - Cadouri , et al. March 8, 2 | 2011-03-08 |
| IC layout physical verification method Grant 7,243,321 - Wang , et al. July 10, 2 | 2007-07-10 |
| IC layout physical verification method App 20050229126 - Wang, Xiaojun ; et al. | 2005-10-13 |
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