MEARS TECHNOLOGIES, INC.

Patent Applications and Registrations

Patent applications and USPTO patent grants for MEARS TECHNOLOGIES, INC..The latest application filed is for "semiconductor device including a superlattice and replacement metal gate structure and related methods".

Company Profile

0.30.12

MEARS TECHNOLOGIES, INC. - Wellesley Hills MA US
MEARS Technologies, Inc. - Newton MA US
MEARS TECHNOLOGIES, INC. - Waltham MA
MEARS Technologies, Inc. - Watham MA
MEARS TECHNOLOGIES, INC. -

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks

Patent Activity

Patent	Date
Semiconductor Device Including A Superlattice And Replacement Metal Gate Structure And Related Methods App 20160149023 - Mears; Robert J. ; et al.	2016-05-26
Vertical Semiconductor Devices Including Superlattice Punch Through Stop Layer And Related Methods App 20160099317 - MEARS; ROBERT ; et al.	2016-04-07
Vertical semiconductor devices including superlattice punch through stop layer and related methods Grant 9,275,996 - Mears , et al. March 1, 2	2016-03-01
Semiconductor Devices With Enhanced Deterministic Doping And Related Methods App 20150357414 - MEARS; Robert J.	2015-12-10
Semiconductor Devices Including Superlattice Depletion Layer Stack And Related Methods App 20150144878 - Mears; Robert ; et al.	2015-05-28
Vertical Semiconductor Devices Including Superlattice Punch Through Stop Layer And Related Methods App 20150144877 - Mears; Robert ; et al.	2015-05-28
Multiple-wavelength opto-electronic device including a superlattice Grant 8,389,974 - Mears , et al. March 5, 2	2013-03-05
Semiconductor Device Including A Superlattice And Dopant Diffusion Retarding Implants And Related Methods App 20110215299 - RAO; KALIPATNAM	2011-09-08
Multiple-wavelength Opto-electronic Device Including A Superlattice App 20110193063 - Mears; Robert J. ; et al.	2011-08-11
Semiconductor device including a metal-to-semiconductor superlattice interface layer and related methods Grant 7,928,425 - Rao April 19, 2	2011-04-19
Multiple-wavelength opto-electronic device including a superlattice Grant 7,880,161 - Mears , et al. February 1, 2	2011-02-01
Method for making a multiple-wavelength opto-electronic device including a superlattice Grant 7,863,066 - Mears , et al. January 4, 2	2011-01-04
Electronic Device Including An Electrically Polled Superlattice And Related Methods App 20100270535 - Halilov; Samed ; et al.	2010-10-28
Method for making a semiconductor device including shallow trench isolation (STI) regions with maskless superlattice deposition following STI formation and related structures Grant 7,812,339 - Mears , et al. October 12, 2	2010-10-12
Semiconductor device with a vertical MOSFET including a superlattice and related methods Grant 7,781,827 - Rao August 24, 2	2010-08-24
Semiconductor device comprising a lattice matching layer Grant 7,718,996 - Dukovski , et al. May 18, 2	2010-05-18
Method for making a semiconductor device comprising a lattice matching layer Grant 7,700,447 - Dukovski , et al. April 20, 2	2010-04-20
Semiconductor device including a floating gate memory cell with a superlattice channel Grant 7,659,539 - Kreps , et al. February 9, 2	2010-02-09
Methods of making spintronic devices with constrained spintronic dopant Grant 7,625,767 - Huang , et al. December 1, 2	2009-12-01
Semiconductor device including a strained superlattice layer above a stress layer Grant 7,612,366 - Mears , et al. November 3, 2	2009-11-03
Semiconductor device including a strained superlattice and overlying stress layer and related methods Grant 7,598,515 - Mears , et al. October 6, 2	2009-10-06
Semiconductor device having a semiconductor-on-insulator configuration and a superlattice Grant 7,586,116 - Kreps , et al. September 8, 2	2009-09-08
Microelectromechanical systems (MEMS) device including a superlattice Grant 7,586,165 - Blanchard September 8, 2	2009-09-08
Method for making a semiconductor device including regions of band-engineered semiconductor superlattice to reduce device-on resistance Grant 7,535,041 - Blanchard May 19, 2	2009-05-19
Semiconductor device including regions of band-engineered semiconductor superlattice to reduce device-on resistance Grant 7,531,829 - Blanchard May 12, 2	2009-05-12
Semiconductor device including a strained superlattice between at least one pair of spaced apart stress regions Grant 7,531,828 - Mears , et al. May 12, 2	2009-05-12
Semiconductor device including a memory cell with a negative differential resistance (NDR) device Grant 7,531,850 - Blanchard May 12, 2	2009-05-12
Method for making an electronic device including a poled superlattice having a net electrical dipole moment Grant 7,517,702 - Halilov , et al. April 14, 2	2009-04-14
Method for making a semiconductor device including shallow trench isolation (STI) regions with a superlattice therebetween Grant 7,514,328 - Rao April 7, 2	2009-04-07
Method for making a semiconductor device having a semiconductor-on-insulator (SOI) configuration and including a superlattice on a thin semiconductor layer Grant 7,491,587 - Rao February 17, 2	2009-02-17
Method for making a semiconductor device comprising a superlattice dielectric interface layer Grant 7,446,002 - Mears , et al. November 4, 2	2008-11-04
Electronic device comprising active optical devices with an energy band engineered superlattice Grant 7,446,334 - Mears , et al. November 4, 2	2008-11-04
Method For Making A Semiconductor Device Including Shallow Trench Isolation (sti) Regions With Maskless Superlattice Deposition Following Sti Formation And Related Structures App 20080258134 - Mears; Robert J. ; et al.	2008-10-23
Semiconductor device comprising a superlattice channel vertically stepped above source and drain regions Grant 7,436,026 - Kreps October 14, 2	2008-10-14
Semiconductor device including a MOSFET having a band-engineered superlattice with a semiconductor cap layer providing a channel Grant 7,435,988 - Mears , et al. October 14, 2	2008-10-14
Integrated circuit comprising an active optical device having an energy band engineered superlattice Grant 7,432,524 - Mears , et al. October 7, 2	2008-10-07
Infrared biometric finger sensor including infrared antennas and associated methods Grant 7,433,729 - Setlak , et al. October 7, 2	2008-10-07
Semiconductor Device Including A Metal-to-semiconductor Superlattice Interface Layer And Related Methods App 20080179588 - Rao; Kalipatnam Vivek	2008-07-31
Semiconductor Device With A Vertical Mosfet Including A Superlattice And Related Methods App 20080179664 - Rao; Kalipatnam Vivek	2008-07-31
Spintronic Devices With Constrained Spintronic Dopant App 20080012004 - Huang; Xiangyang ; et al.	2008-01-17
Semiconductor device including MOSFET having band-engineered superlattice Grant 7,303,948 - Mears , et al. December 4, 2	2007-12-04

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