McStay; Kevin

Patent Applications and Registrations

Patent applications and USPTO patent grants for McStay; Kevin.The latest application filed is for "high density finfet devices with unmerged fins".

Company Profile

0.14.11

McStay; Kevin - Hopewell Junction NY
McStay; Kevin - Hopewell Jct. NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Structure and method to control bottom corner threshold in an SOI device Grant 9,484,269 - Ervin , et al. November 1, 2	2016-11-01
Merged source drain epitaxy Grant 9,437,496 - Chudzik , et al. September 6, 2	2016-09-06
High Density Finfet Devices With Unmerged Fins App 20150333145 - Chudzik; Michael P. ; et al.	2015-11-19
FET structures with trench implantation to improve back channel leakage and body resistance Grant 8,809,953 - Fried , et al. August 19, 2	2014-08-19
Isolation in CMOSFET devices utilizing buried air bags Grant 8,395,217 - Cheng , et al. March 12, 2	2013-03-12
FET structures with trench implantation to improve back channel leakage and body resistance Grant 8,236,632 - Fried , et al. August 7, 2	2012-08-07
Gated diode structure and method including relaxed liner Grant 8,232,603 - Chou , et al. July 31, 2	2012-07-31
Fet Structures With Trench Implantation To Improve Back Channel Leakage And Body Resistance App 20120187490 - Fried; David M. ; et al.	2012-07-26
Fet Structures With Trench Implantation To Improve Back Channel Leakage And Body Resistance App 20120086077 - FRIED; DAVID M ; et al.	2012-04-12
Structure And Method To Control Bottom Corner Threshold In An Soi Device App 20110316061 - ERVIN; Joseph ; et al.	2011-12-29
Transistor having V-shaped embedded stressor Grant 7,989,298 - Chan , et al. August 2, 2	2011-08-02
Transistor Having V-shaped Embedded Stressor App 20110183486 - Chan; Kevin K. ; et al.	2011-07-28
Gated Diode Structure and Method Including Relaxed Liner App 20100237421 - Chou; Anthony I. ; et al.	2010-09-23
Test structure for resistive open detection using voltage contrast inspection and related methods Grant 7,733,109 - Ahsan , et al. June 8, 2	2010-06-08
Test Structure And Method For Resistive Open Detection Using Voltage Contrast Inspection App 20090096461 - Ahsan; Ishtiaq ; et al.	2009-04-16
Body-Contacted Silicon on Insulation (SOI) field effect transistors App 20070048925 - McStay; Kevin ; et al.	2007-03-01
Self-aligned drain/channel junction in vertical pass transistor DRAM cell design for device scaling Grant 6,930,004 - Wang , et al. August 16, 2	2005-08-16
Self-aligned Drain/channel Junction In Vertical Pass Transistor Dram Cell Design For Device Scaling App 20050037561 - Wang, Geng ; et al.	2005-02-17
Optimized buried strap formation utilizing polycrystalline SixC1-x App 20040175897 - Wensley, Paul ; et al.	2004-09-09
Vertical MOSFET with horizontally graded channel doping Grant 6,740,920 - Chidambarrao , et al. May 25, 2	2004-05-25
Wordline on and off voltage compensation circuit based on the array device threshold voltage Grant 6,693,843 - Maffitt , et al. February 17, 2	2004-02-17
Vertical MOSFET with horizontally graded channel doping App 20030168687 - Chidambarrao, Dureseti ; et al.	2003-09-11

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