| Patent | Date |
|---|
Metallic synapses for neuromorphic and evolvable hardware
Grant 10,840,174 - Fetterolf , et al. November 17, 2 | 2020-11-17 |
On-chip sensor for monitoring active circuits on integrated circuit (IC) chips
Grant 10,191,108 - Freeman , et al. Ja | 2019-01-29 |
Metallic Synapses For Neuromorphic And Evolvable Hardware
App 20180300599 - FETTEROLF; SHAWN P. ; et al. | 2018-10-18 |
Electromigration test structure for Cu barrier integrity and blech effect evaluations
Grant 9,759,766 - Bonilla , et al. September 12, 2 | 2017-09-12 |
Electromigration Test Structure For Cu Barrier Integrity And Blech Effect Evaluations
App 20170176514 - BONILLA; GRISELDA ; et al. | 2017-06-22 |
On-chip Sensor For Monitoring Active Circuits On Integrated Circuit (ic) Chips
App 20170146592 - Freeman; Gregory G. ; et al. | 2017-05-25 |
Electromigration test structure for Cu barrier integrity and blech effect evaluations
Grant 9,472,477 - Bonilla , et al. October 18, 2 | 2016-10-18 |
Method and structure for determining thermal cycle reliability
Grant 9,443,776 - Filippi , et al. September 13, 2 | 2016-09-13 |
Method And Structure For Determining Thermal Cycle Reliability
App 20150262899 - FILIPPI; RONALD G. ; et al. | 2015-09-17 |
Electromigration resistant via-to-line interconnect
Grant 08922022 - | 2014-12-30 |
Electromigration resistant via-to-line interconnect
Grant 8,922,022 - Li , et al. December 30, 2 | 2014-12-30 |
Method and system to predict a number of electromigration critical elements
Grant 8,726,201 - Bickford , et al. May 13, 2 | 2014-05-13 |
Electromigration Resistant Via-to-line Interconnect
App 20120119366 - Li; Baozhen ; et al. | 2012-05-17 |
Electromigration resistant via-to-line interconnect
Grant 8,114,768 - Li , et al. February 14, 2 | 2012-02-14 |
Method And System To Predict A Number Of Electromigration Critical Elements
App 20110283249 - BICKFORD; Jeanne P. ; et al. | 2011-11-17 |
Method for prediction of premature dielectric breakdown in a semiconductor
Grant 8,053,257 - Chanda , et al. November 8, 2 | 2011-11-08 |
Method of forming an embedded barrier layer for protection from chemical mechanical polishing process
Grant 7,968,456 - McLaughlin , et al. June 28, 2 | 2011-06-28 |
Electromigration Resistant Via-to-line Interconnect
App 20100164116 - Li; Baozhen ; et al. | 2010-07-01 |
Laser fuse structures for high power applications
Grant 7,701,035 - Greco , et al. April 20, 2 | 2010-04-20 |
Structure for modeling stress-induced degradation of conductive interconnects
Grant 7,692,439 - Chanda , et al. April 6, 2 | 2010-04-06 |
Test structure for determining optimal seed and liner layer thicknesses for dual damascene processing
Grant 7,671,362 - Bolom , et al. March 2, 2 | 2010-03-02 |
Structure for monitoring stress-induced degradation of conductive interconnects
Grant 7,639,032 - Chanda , et al. December 29, 2 | 2009-12-29 |
Test Structure For Determining Optimal Seed And Liner Layer Thicknesses For Dual Damascene Processing
App 20090146143 - Bolom; Tibor ; et al. | 2009-06-11 |
Method of forming a crack stop void in a low-k dielectric layer between adjacent fuses
Grant 7,479,447 - Daubenspeck , et al. January 20, 2 | 2009-01-20 |
Non-Destructive Electrical Characterization Macro and Methodology for In-Line Interconnect Spacing Monitoring
App 20090006014 - Chanda; Kaushik ; et al. | 2009-01-01 |
Increasing electromigration lifetime and current density in IC using vertically upwardly extending dummy via
Grant 7,439,173 - Greco , et al. October 21, 2 | 2008-10-21 |
Structure for modeling stress-induced degradation of conductive interconnects
App 20080231312 - Chanda; Kaushik ; et al. | 2008-09-25 |
Embedded Barrier For Dielectric Encapsulation
App 20080217777 - McLaughlin; Paul S. ; et al. | 2008-09-11 |
Method For Prediction Of Premature Dielectric Breakdown In A Semiconductor
App 20080174334 - Chanda; Kaushik ; et al. | 2008-07-24 |
Structure and method for monitoring stress-induced degradation of conductive interconnects
Grant 7,397,260 - Chanda , et al. July 8, 2 | 2008-07-08 |
Embedded barrier for dielectric encapsulation
Grant 7,394,154 - McLaughlin , et al. July 1, 2 | 2008-07-01 |
Method for monitoring stress-induced degradation of conductive interconnects
App 20080107149 - Chanda; Kaushik ; et al. | 2008-05-08 |
Increasing Electromigration Lifetime And Current Density In Ic Using Vertically Upwardly Extending Dummy Via
App 20080026567 - Greco; Stephen E. ; et al. | 2008-01-31 |
Increasing electromigration lifetime and current density in IC using vertically upwardly extending dummy via
Grant 7,301,236 - Greco , et al. November 27, 2 | 2007-11-27 |
Laser Fuse Structures For High Power Applications
App 20070120232 - Greco; Stephen E. ; et al. | 2007-05-31 |
Structure And Method For Monitoring Stress-induced Degradation Of Conductive Interconnects
App 20070115018 - Chanda; Kaushik ; et al. | 2007-05-24 |
Increasing Electromigration Lifetime And Current Densityin Ic Using Vertically Upwardly Extending Dummy Via
App 20070087555 - Greco; Stephen E. ; et al. | 2007-04-19 |
Embedded barrier for dielectric encapsulation
App 20070057374 - McLaughlin; Paul S. ; et al. | 2007-03-15 |
Method For Prediction Of Premature Dielectric Breakdown In A Semiconductor
App 20060281338 - Chanda; Kaushik ; et al. | 2006-12-14 |
Method Of Forming A Crack Stop Void In A Low-k Dielectric Layer Between Adjacent Fusees
App 20060223242 - Daubenspeck; Timothy H. ; et al. | 2006-10-05 |
Test structure for locating electromigration voids in dual damascene interconnects
Grant 6,995,392 - McLaughlin , et al. February 7, 2 | 2006-02-07 |
Test structure for locating electromigration voids in dual damascene interconnects
App 20040026693 - McLaughlin, Paul S. ; et al. | 2004-02-12 |
Sub-quarter-micron copper interconnections with improved electromigration resistance and reduced defect sensitivity
Grant 6,069,068 - Rathore , et al. May 30, 2 | 2000-05-30 |
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