McGinnis; Darrell S.
Patent Applications and Registrations
Patent applications and USPTO patent grants for McGinnis; Darrell S..The latest application filed is for "hybrid memory architecture".
- McGinnis; Darrell S. - Cornelius OR
- McGinnis; Darrell S. - Sherwood OR
- McGinnis; Darrell S. - Hillsboro OR
- McGinnis; Darrell S - Hillsboro OR
| Patent | Date |
|---|---|
| Hybrid Memory Architecture App 20160224252 - Hutsell; Steven R. ; et al. | 2016-08-04 |
| Mechanisms and techniques for providing cache tags in dynamic random access memory Grant 8,612,832 - McGinnis , et al. December 17, 2 | 2013-12-17 |
| Mechanisms And Techniques For Providing Cache Tags In Dynamic Random Access Memory App 20120254700 - McGinnis; Darrell S. ; et al. | 2012-10-04 |
| System and method for scalable clock gearing mechanism Grant 7,249,274 - McGinnis July 24, 2 | 2007-07-24 |
| Retry of a device read transaction Grant 7,177,989 - McGinnis February 13, 2 | 2007-02-13 |
| Logical to physical address mapping of chip selects Grant 7,133,960 - Thompson , et al. November 7, 2 | 2006-11-07 |
| System and method for dynamic rank specific timing adjustments for double data rate (DDR) components Grant 7,127,584 - Thompson , et al. October 24, 2 | 2006-10-24 |
| Write pointer error recovery systems and methods Grant 7,106,633 - Thompson , et al. September 12, 2 | 2006-09-12 |
| Write pointer error recovery Grant 6,956,775 - Thompson , et al. October 18, 2 | 2005-10-18 |
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