McGettigan; Edward S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for McGettigan; Edward S..The latest application filed is for "boundary-scan circuit used for analog an ddigital testing of an integrated circuit".

Company Profile

0.10.1

McGettigan; Edward S. - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
System and methods for reducing clock power in integrated circuits Grant 8,104,012 - Klein , et al. January 24, 2	2012-01-24
Partial configuration of a programmable gate array using a bus macro and coupling the third design Grant 7,669,163 - Camilleri , et al. February 23, 2	2010-02-23
Boundary-scan circuit used for analog and digital testing of an integrated circuit Grant 7,102,555 - Collins , et al. September 5, 2	2006-09-05
Systems and methods of utilizing virtual input and output modules in a programmable logic device Grant 7,085,706 - McGettigan , et al. August 1, 2	2006-08-01
Partial reconfiguration of a programmable gate array using a bus macro Grant 7,024,651 - Camilleri , et al. April 4, 2	2006-04-04
Boundary-scan Circuit Used For Analog An Ddigital Testing Of An Integrated Circuit App 20050242980 - Collins, Anthony J. ; et al.	2005-11-03
Clock template for configuring a programmable gate array Grant 6,732,347 - Camilleri , et al. May 4, 2	2004-05-04
Partial reconfiguration of a programmable gate array using a bus macro Grant 6,462,579 - Camilleri , et al. October 8, 2	2002-10-08
Logic block used as dynamically configurable logic function Grant 6,384,627 - Fross , et al. May 7, 2	2002-05-07
Loadable up-down counter with asynchronous reset Grant 6,157,209 - McGettigan December 5, 2	2000-12-05
Method for design implementation of routing in an FPGA using placement directives such as local outputs and virtual buffers Grant 6,086,629 - McGettigan , et al. July 11, 2	2000-07-11

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.