McGee; William A

Patent Applications and Registrations

Patent applications and USPTO patent grants for McGee; William A.The latest application filed is for "systems and methods for converting a matrix input to a vectorized input for a matrix processor".

Company Profile

2.8.6

McGee; William A - San Jose CA
McGee; William A. - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Systems and methods for converting a matrix input to a vectorized input for a matrix processor Grant 10,747,844 - Bannon , et al. A	2020-08-18
Systems And Methods For Converting A Matrix Input To A Vectorized Input For A Matrix Processor App 20190179870 - BANNON; Peter Joseph ; et al.	2019-06-13
Sidecar SRAM for high granularity in floor plan aspect ratio Grant 9,575,891 - Riley , et al. February 21, 2	2017-02-21
Sidecar Sram For High Granularity In Floor Plan Aspect Ratio App 20150364168 - Riley; John R. ; et al.	2015-12-17
Method and apparatus for addressing and improving holds in logic networks Grant 8,347,250 - Gonzalez , et al. January 1, 2	2013-01-01
Method And Apparatus For Addressing And Improving Holds In Logic Networks App 20120167030 - Gonzalez; George A. ; et al.	2012-06-28
Constraint management and validation for template-based circuit design Grant 8,010,920 - Bartolotti , et al. August 30, 2	2011-08-30
Constraint Management And Validation For Template-based Circuit Design App 20100153893 - Bartolotti; Richard L. ; et al.	2010-06-17
Memory device and method of manufacture App 20050167733 - McGee, William A. ; et al.	2005-08-04
Semiconductor memory with shadow memory cell Grant 6,807,107 - McGee , et al. October 19, 2	2004-10-19
Wordline latching in semiconductor memories Grant 6,798,712 - Gieseke , et al. September 28, 2	2004-09-28
System and method for reducing a ground bounce during write by selectively delaying address and data lines with different multiple predetermined amount of delay Grant 6,760,855 - McGee , et al. July 6, 2	2004-07-06
Wordline latching in semiconductor memories App 20040004901 - Gieseke, Bruce Alan ; et al.	2004-01-08
Mechanism for handling 16-bit addressing in a processor Grant 6,363,471 - Meier , et al. March 26, 2	2002-03-26

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.