McFarland; Harold L.

Patent Applications and Registrations

Patent applications and USPTO patent grants for McFarland; Harold L..The latest application filed is for "method and apparatus for debugging an integrated circuit".

Company Profile

0.11.0

McFarland; Harold L. - Los Gatos CA
McFarland; Harold L. - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for debugging an integrated circuit Grant 6,499,123 - McFarland , et al. December 24, 2	2002-12-24
Method and apparatus for executing string instructions Grant 6,212,629 - McFarland , et al. April 3, 2	2001-04-03
Semi-autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for speculative and out-of-order execution of complex instructions Grant 5,781,753 - McFarland , et al. July 14, 1	1998-07-14
Semi-Autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for sepculative and out-of-order execution of complex instructions Grant 5,768,575 - McFarland , et al. June 16, 1	1998-06-16
Computer processor with distributed pipeline control that allows functional units to complete operations out of order while maintaining precise interrupts Grant 5,682,492 - McFarland , et al. October 28, 1	1997-10-28
Crossing transfers for maximizing the effective bandwidth in a dual-bus architecture Grant 5,627,976 - McFarland , et al. May 6, 1	1997-05-06
Computer processor with distributed pipeline control that allows functional units to complete operations out of order while maintaining precise interrupts Grant 5,442,757 - McFarland , et al. * August 15, 1	1995-08-15
Crossing transfers for maximizing the effective bandwidth in a dual-bus architecture Grant 5,414,820 - McFarland , et al. May 9, 1	1995-05-09
Transparent data bus sizing Grant 5,388,227 - McFarland February 7, 1	1995-02-07
Bus arbitration in a dual-bus architecture where one bus has relatively high latency Grant 5,369,748 - McFarland , et al. November 29, 1	1994-11-29
Processor having plurality of functional units for orderly retiring outstanding operations based upon its associated tags Grant 5,226,126 - McFarland , et al. July 6, 1	1993-07-06

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