loadpatents
name:-0.00052094459533691
name:-0.01805305480957
name:-0.0015380382537842
McEwen; Ian L. Patent Filings

McEwen; Ian L.

Patent Applications and Registrations

Patent applications and USPTO patent grants for McEwen; Ian L..The latest application filed is for "device graphics rendering for electronic designs".

Company Profile
1.15.0
  • McEwen; Ian L. - Boulder CO
  • McEwen; Ian L. - Golden CO
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Device graphics rendering for electronic designs
Grant 10,331,837 - McEwen , et al.
2019-06-25
Graphical representation of integrated circuits
Grant 9,454,630 - Lee , et al. September 27, 2
2016-09-27
Method for data transport
Grant 8,752,075 - Lee , et al. June 10, 2
2014-06-10
Methods of prioritizing routing resources to generate and evaluate test designs in programmable logic devices
Grant 8,418,221 - Young , et al. April 9, 2
2013-04-09
Determining timing paths within a circuit block of a programmable integrated circuit
Grant 8,117,577 - Vadi , et al. February 14, 2
2012-02-14
Method of routing a design to increase the quality of the design
Grant 8,104,011 - Sundararajan , et al. January 24, 2
2012-01-24
Method and apparatus for testing programmable integrated circuits
Grant 8,082,535 - McEwen , et al. December 20, 2
2011-12-20
Isolation verification within integrated circuits
Grant 7,949,974 - Moore , et al. May 24, 2
2011-05-24
Method and apparatus for reducing the number of test designs for device testing
Grant 7,480,842 - Young , et al. January 20, 2
2009-01-20
Method of routing a design to increase the quality of the design
Grant 7,367,007 - Sundararajan , et al. April 29, 2
2008-04-29
Reducing design execution run time bit stream size for device testing
Grant 7,299,430 - McEwen , et al. November 20, 2
2007-11-20
Fault isolation in a programmable logic device
Grant 7,234,120 - Staab , et al. June 19, 2
2007-06-19
Routing with frame awareness to minimize device programming time and test cost
Grant 7,149,997 - Young , et al. December 12, 2
2006-12-12
Methods of generating test designs for testing specific routing resources in programmable logic devices
Grant 7,058,919 - Young , et al. June 6, 2
2006-06-06

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