Mayuzumi; Satoru

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mayuzumi; Satoru.The latest application filed is for "semiconductor device and manufacturing method thereof".

Company Profile

13.22.25

Mayuzumi; Satoru - Tokyo JP
Mayuzumi; Satoru - Cupertino CA
Mayuzumi; Satoru - San Jose CA
MAYUZUMI; Satoru - Yokkaichi JP
Mayuzumi; Satoru - Boise ID
Mayuzumi, Satoru - Kanagawa JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor Device And Manufacturing Method Thereof App 20210226056 - Mayuzumi; Satoru	2021-07-22
Semiconductor device and manufacturing method thereof Grant 10,868,177 - Mayuzumi December 15, 2	2020-12-15
Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions Grant 10,854,751 - Mayuzumi , et al. December 1, 2	2020-12-01
Three-dimensional memory device with horizontal silicon channels and method of making the same Grant 10,833,101 - Shimomura , et al. November 10, 2	2020-11-10
Three-dimensional Memory Device With Horizontal Silicon Channels And Method Of Making The Same App 20200286901 - SHIMOMURA; Shigeki ; et al.	2020-09-10
Three-dimensional memory device containing cobalt capped copper lines and method of making the same Grant 10,748,966 - Mayuzumi , et al. A	2020-08-18
Semiconductor Device Having Curved Gate Electrode Aligned With Curved Side-wall Insulating Film And Stress-introducing Layer Bet App 20200119194 - Mayuzumi; Satoru ; et al.	2020-04-16
Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions Grant 10,535,769 - Mayuzumi , et al. Ja	2020-01-14
Three-dimensional Memory Device Containing Cobalt Capped Copper Lines And Method Of Making The Same App 20200006431 - MAYUZUMI; Satoru ; et al.	2020-01-02
Air Gap Three-dimensional Cross Rail Memory Device And Method Of Making Thereof App 20190259772 - TAKAHASHI; Yuji ; et al.	2019-08-22
Air gap three-dimensional cross rail memory device and method of making thereof Grant 10,381,366 - Takahashi , et al. A	2019-08-13
Semiconductor Device Having Curved Gate Electrode Aligned With Curved Side-wall Insulating Film And Stress-introducing Layer Bet App 20190207029 - Mayuzumi; Satoru ; et al.	2019-07-04
Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions Grant 10,269,961 - Mayuzumi , et al.	2019-04-23
Semiconductor Device And Manufacturing Method Thereof App 20190043988 - Mayuzumi; Satoru	2019-02-07
Method for fabricating a metal high-k gate stack for a buried recessed access device Grant 10,199,227 - Mayuzumi , et al. Fe	2019-02-05
Semiconductor Device Having Curved Gate Electrode Aligned With Curved Side-wall Insulating Film And Stress-introducing Layer Between Channel Region And Source And Drain Regions App 20180190820 - Mayuzumi; Satoru ; et al.	2018-07-05
Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions Grant 9,947,790 - Mayuzumi , et al. April 17, 2	2018-04-17
Transistors having strained channel under gate in a recess Grant 9,876,109 - Mayuzumi , et al. January 23, 2	2018-01-23
Method For Fabricating A Metal High-k Gate Stack For A Buried Recessed Access Device App 20170263458 - Mayuzumi; Satoru ; et al.	2017-09-14
Transistors App 20170194494 - Mayuzumi; Satoru ; et al.	2017-07-06
Method for fabricating a metal high-k gate stack for a buried recessed access device Grant 9,680,007 - Mayuzumi , et al. June 13, 2	2017-06-13
Semiconductor Device Having Curved Gate Electrode Aligned With Curved Side-wall Insulating Film And Stress-introducing Layer Between Channel Region And Source And Drain Regions App 20170148915 - Mayuzumi; Satoru ; et al.	2017-05-25
Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions Grant 9,601,622 - Mayuzumi , et al. March 21, 2	2017-03-21
Semiconductor Device Having Curved Gate Electrode Aligned With Curved Side-wall Insulating Film And Stress-introducing Layer Between Channel Region And Source And Drain Regions App 20160218213 - Mayuzumi; Satoru ; et al.	2016-07-28
Method For Fabricating A Metal High-k Gate Stack For A Buried Recessed Access Device App 20160204247 - Mayuzumi; Satoru ; et al.	2016-07-14
Method for fabricating a metal high-k gate stack for a buried recessed access device Grant 9,337,042 - Mayuzumi , et al. May 10, 2	2016-05-10
Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions Grant 9,337,305 - Mayuzumi , et al. May 10, 2	2016-05-10
Semiconductor Device Having A Stress-introducing Layer Between Channel Region And Source And Drain Regions App 20150340499 - Mayuzumi; Satoru ; et al.	2015-11-26
Transistors App 20150287825 - Mayuzumi; Satoru ; et al.	2015-10-08
Semiconductor device having a stress-inducing layer between channel region and source and drain regions Grant 9,153,663 - Mayuzumi , et al. October 6, 2	2015-10-06
Method For Fabricating A Metal High-k Gate Stack For A Buried Recessed Access Device App 20150187586 - Mayuzumi; Satoru ; et al.	2015-07-02
Method for fabricating a metal high-k gate stack for a buried recessed access device Grant 8,980,713 - Mayuzumi , et al. March 17, 2	2015-03-17
Method For Fabricating A Metal High-k Gate Stack For A Buried Recessed Access Device App 20140357033 - MAYUZUMI; SATORU ; et al.	2014-12-04
Semiconductor device including source/drain regions and a gate electrode, and having contact portions Grant 8,896,068 - Mayuzumi November 25, 2	2014-11-25
Semiconductor memory system with bit line and method of manufacture thereof Grant 8,779,546 - Tsukamoto , et al. July 15, 2	2014-07-15
Semiconductor Device App 20120199829 - Mayuzumi; Satoru	2012-08-09
Semiconductor Device And Manufacturing Method Thereof App 20120032240 - Mayuzumi; Satoru	2012-02-09
Semiconductor Device And Method For Manufacturing The Same App 20110042752 - Mayuzumi; Satoru	2011-02-24
Semiconductor Device And Manufacturing Method Thereof App 20100314694 - Mayuzumi; Satoru ; et al.	2010-12-16
Semiconductor device and method of fabricating the same Grant 6,841,472 - Mayuzumi January 11, 2	2005-01-11
Method for fabricating a MOSFET Grant 6,713,333 - Mayuzumi March 30, 2	2004-03-30
Method for fabricating semiconductor devices App 20030219953 - Mayuzumi, Satoru	2003-11-27
Semiconductor device and method of fabricating the same App 20030216022 - Mayuzumi, Satoru	2003-11-20
Method for fabricating a MOSFET App 20030082861 - Mayuzumi, Satoru	2003-05-01
Semiconductor device and method of fabricating the same App 20020079525 - Mayuzumi, Satoru	2002-06-27

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