May; Michael David
Patent Applications and Registrations
Patent applications and USPTO patent grants for May; Michael David.The latest application filed is for "processor communications".
Company Profile
0.29.20
- May; Michael David - Bristol GB
- May; Michael David - Clifton GB
Patent Activity
| Patent | Date |
|---|---|
| Interface between a bus and a inter-thread interconnect Grant 9,594,720 - Stanford-Jason , et al. March 14, 2 | 2017-03-14 |
| Processor instruction set for controlling an event source to generate events used to schedule threads Grant 9,367,321 - May June 14, 2 | 2016-06-14 |
| Processor Communications App 20150113184 - STANFORD-JASON; Andrew ; et al. | 2015-04-23 |
| Synchronising groups of threads with dedicated hardware logic Grant 8,966,488 - May , et al. February 24, 2 | 2015-02-24 |
| Processor architecture for use in scheduling threads in response to communication activity Grant 8,898,438 - May November 25, 2 | 2014-11-25 |
| Thread communications Grant 8,347,312 - May , et al. January 1, 2 | 2013-01-01 |
| Processor communication tokens Grant 8,224,884 - May July 17, 2 | 2012-07-17 |
| Interface processor Grant 8,219,789 - May July 10, 2 | 2012-07-10 |
| Processor instruction set for controlling threads to respond to events Grant 8,185,722 - May May 22, 2 | 2012-05-22 |
| Message routing scheme for an array having a switch with address comparing component and message routing component Grant 8,185,719 - May May 22, 2 | 2012-05-22 |
| Token protocol Grant 8,139,601 - May March 20, 2 | 2012-03-20 |
| Message routing scheme Grant 7,962,717 - May June 14, 2 | 2011-06-14 |
| Processor with memory access stage adapted to fetch an instruction of a thread when no memory access operation is detected Grant 7,958,333 - May June 7, 2 | 2011-06-07 |
| Timing Analysis App 20110131396 - May; Michael David ; et al. | 2011-06-02 |
| Integrated circuit structure Grant 7,948,060 - Williamson , et al. May 24, 2 | 2011-05-24 |
| Message Routing Scheme App 20110066825 - MAY; Michael David | 2011-03-17 |
| Compact instruction set encoding Grant 7,676,653 - May March 9, 2 | 2010-03-09 |
| Integrated Circuit Structure App 20100001405 - Williamson; Ken ; et al. | 2010-01-07 |
| Scheduling thread upon ready signal set when port transfers data on trigger time activation Grant 7,617,386 - May , et al. November 10, 2 | 2009-11-10 |
| Resuming thread to service ready port transferring data externally at different clock rate than internal circuitry of a processor Grant 7,613,909 - May , et al. November 3, 2 | 2009-11-03 |
| Processor Communication Tokens App 20090013156 - May; Michael David | 2009-01-08 |
| Token Protocol App 20090013331 - May; Michael David | 2009-01-08 |
| Thread Communications App 20090013329 - May; Michael David ; et al. | 2009-01-08 |
| Synchronisation App 20090013323 - May; Michael David ; et al. | 2009-01-08 |
| Processor communication tokens App 20090013397 - May; Michael David | 2009-01-08 |
| Token Protocol App 20090010260 - May; Michael David | 2009-01-08 |
| Scheduling Threads In A Processor App 20080301409 - MAY; Michael David | 2008-12-04 |
| Compact instruction set encoding App 20080282066 - May; Michael David | 2008-11-13 |
| Timed ports App 20080263318 - May; Michael David ; et al. | 2008-10-23 |
| Clocked ports App 20080263330 - May; Michael David ; et al. | 2008-10-23 |
| Interface processor App 20080229311 - May; Michael David | 2008-09-18 |
| Processor instruction set App 20080229310 - May; Michael David | 2008-09-18 |
| Message routing scheme App 20080229059 - May; Michael David | 2008-09-18 |
| Processor register architecture App 20080229312 - May; Michael David | 2008-09-18 |
| Processor instruction set App 20080229083 - May; Michael David | 2008-09-18 |
| Microcomputer chips with interconnected address and data paths Grant 6,757,759 - Jones , et al. June 29, 2 | 2004-06-29 |
| System and method for communicating information to and from a single chip computer system through an external communication port with translation circuitry Grant 6,697,931 - Jones , et al. February 24, 2 | 2004-02-24 |
| Interrupt and control packets for a microcomputer Grant 6,658,514 - Jones , et al. December 2, 2 | 2003-12-02 |
| Microcomputer with interrupt packets Grant 6,549,965 - Jones , et al. April 15, 2 | 2003-04-15 |
| Microcomputer App 20030034544 - May, Michael David ; et al. | 2003-02-20 |
| Microcomputer with high density RAM on single chip Grant 6,414,368 - May , et al. July 2, 2 | 2002-07-02 |
| System and method for on-chip communication Grant 6,415,344 - Jones , et al. July 2, 2 | 2002-07-02 |
| Microcomputer with packet translation for event packets and memory access packets Grant 6,397,325 - Jones , et al. May 28, 2 | 2002-05-28 |
| Microprocessor having an on-chip CPU fetching a debugging routine from a memory in an external debugging device in response to a control signal received through a debugging port Grant 6,356,960 - Jones , et al. March 12, 2 | 2002-03-12 |
| System and method for booting a computer Grant 6,301,657 - Jones , et al. October 9, 2 | 2001-10-09 |
| System and method for addressing plurality of data values with a single address in a multi-value store on FIFO basis Grant 6,009,508 - May , et al. December 28, 1 | 1999-12-28 |
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