Maxson; Mark Owen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Maxson; Mark Owen.The latest application filed is for "authentication using optically sensed relative position".

Company Profile

0.40.47

Maxson; Mark Owen - Mantorville MN
Maxson; Mark Owen - Manterville MN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Authentication Using Optically Sensed Relative Position App 20170039391 - Bartley; Gerald K. ; et al.	2017-02-09
Enhanced architectural interconnect options enabled with flipped die on a multi-chip package Grant 8,174,103 - Bartley , et al. May 8, 2	2012-05-08
Digital data architecture employing redundant links in a daisy chain of component modules Grant 8,108,647 - Bartley , et al. January 31, 2	2012-01-31
Method of enhancing on-chip inductance structure utilizing silicon through via technology Grant 8,079,134 - Maki , et al. December 20, 2	2011-12-20
Implementing enhanced wiring capability for electronic laminate packages Grant 7,954,081 - Bartley , et al. May 31, 2	2011-05-31
Apparatus, and computer program for implementing vertically coupled noise control through a mesh plane in an electronic package design Grant 7,945,883 - Bartley , et al. May 17, 2	2011-05-17
Implementing at-speed Wafer Final Test (WFT) with complete chip coverage Grant 7,852,103 - Bartley , et al. December 14, 2	2010-12-14
Computer system having an apportionable data bus and daisy chained memory chips Grant 7,844,769 - Bartley , et al. November 30, 2	2010-11-30
Implementing At-speed Wafer Final Test (wft) With Complete Chip Coverage App 20100271046 - Bartley; Gerald Keith ; et al.	2010-10-28
Digital Data Architecture Employing Redundant Links in a Daisy Chain of Component Modules App 20100191894 - Bartley; Gerald Keith ; et al.	2010-07-29
Method and structure for connecting, stacking, and cooling chips on a flexible carrier Grant 7,675,164 - Bartley , et al. March 9, 2	2010-03-09
Computer system having daisy chained memory chips Grant 7,673,093 - Bartley , et al. March 2, 2	2010-03-02
Carrier having daisy chain of self timed memory chips Grant 7,660,940 - Bartley , et al. February 9, 2	2010-02-09
Daisy chainable self timed memory chip Grant 7,660,942 - Bartley , et al. February 9, 2	2010-02-09
Enhanced On-Chip Inductance Structure Utilizing Silicon Through Via Technology App 20100024202 - Maki; Andrew Benson ; et al.	2010-02-04
Implementing Redundant Memory Access Using Multiple Controllers for Memory System App 20090300411 - Bartley; Gerald Keith ; et al.	2009-12-03
Implementing Cache Coherency and Reduced Latency Using Multiple Controllers for Memory System App 20090300291 - Bartley; Gerald Keith ; et al.	2009-12-03
Memory controller for daisy chained memory chips Grant 7,627,711 - Bartley , et al. December 1, 2	2009-12-01
Memory chip having an apportionable data bus Grant 7,620,763 - Bartley , et al. November 17, 2	2009-11-17
Carrier having daisy chained memory chips Grant 7,617,350 - Bartley , et al. November 10, 2	2009-11-10
Enhanced Architectural Interconnect Options Enabled With Flipped Die on a Multi-Chip Package App 20090273098 - Bartley; Gerald Keith ; et al.	2009-11-05
Memory controller for daisy chained self timed memory chips Grant 7,577,811 - Bartley , et al. August 18, 2	2009-08-18
Method for implementing component placement suspended within grid array packages for enhanced electrical performance Grant 7,553,696 - Bartley , et al. June 30, 2	2009-06-30
Self timed memory chip having an apportionable data bus Grant 7,546,410 - Bartley , et al. June 9, 2	2009-06-09
Memory system having self timed daisy chained memory chips Grant 7,545,664 - Bartley , et al. June 9, 2	2009-06-09
Implementing Enhanced Wiring Capability For Electronic Laminate Packages App 20090138832 - Bartley; Gerald Keith ; et al.	2009-05-28
Memory system having an apportionable data bus and daisy chained memory chips Grant 7,490,186 - Bartley , et al. February 10, 2	2009-02-10
Daisy chainable memory chip Grant 7,480,201 - Bartley , et al. January 20, 2	2009-01-20
Method for implementing vertically coupled noise control through a mesh plane in an electronic package design Grant 7,472,368 - Bartley , et al. December 30, 2	2008-12-30
Method for implementing enhanced wiring capability for electronic laminate packages Grant 7,472,360 - Bartley , et al. December 30, 2	2008-12-30
Method, Apparatus, and Computer Program Product for Implementing Optimized Channel Routing With Generation of FIR Coefficients App 20080270100 - Fox; Benjamin Aaron ; et al.	2008-10-30
Apparatus, And Computer Program Product For Implementing Vertically Coupled Noise Control Through A Mesh Plane In An Electronic Package Design App 20080270968 - Bartley; Gerald Keith ; et al.	2008-10-30
Method and Structure for Connecting, Stacking, and Cooling Chips on a Flexible Carrier App 20080218974 - Bartley; Gerald Keith ; et al.	2008-09-11
Power Control Structure For Managing A Plurality Of Voltage Islands App 20080185734 - Bartley; Gerald Keith ; et al.	2008-08-07
Method, Apparatus, and Computer Program Product for Implementing Balanced Wiring Delay Within an Electronic Package App 20080178136 - Bartley; Gerald Keith ; et al.	2008-07-24
Method and power control structure for managing plurality of voltage islands Grant 7,402,912 - Bartley , et al. July 22, 2	2008-07-22
Daisy chained memory system Grant 7,345,900 - Bartley , et al. March 18, 2	2008-03-18
Computer system having daisy chained self timed memory chips Grant 7,345,901 - Bartley , et al. March 18, 2	2008-03-18
Daisy chainable memory chip Grant 7,342,816 - Bartley , et al. March 11, 2	2008-03-11
Method and Structure for Implementing Component Placement Suspended within Grid Array Packages for Enhanced Electrical Performance App 20080054453 - Bartley; Gerald Keith ; et al.	2008-03-06
Memory Chip Having an Apportionable Data Bus App 20080040529 - Bartley; Gerald Keith ; et al.	2008-02-14
Daisy Chainable Memory Chip App 20080031077 - Bartley; Gerald Keith ; et al.	2008-02-07
Daisy Chainable Memory Chip App 20080031076 - Bartley; Gerald Keith ; et al.	2008-02-07
Daisy Chainable Self Timed Memory Chip App 20080028161 - Bartley; Gerald Keith ; et al.	2008-01-31
Computer System Having an Apportionable Data Bus App 20080028125 - Bartley; Gerald Keith ; et al.	2008-01-31
Carrier Having Daisy Chained Memory Chips App 20080028159 - Bartley; Gerald Keith ; et al.	2008-01-31
Daisy Chained Memory System App 20080025129 - Bartley; Gerald Keith ; et al.	2008-01-31
Computer System Having Daisy Chained Self Timed Memory Chips App 20080025130 - Bartley; Gerald Keith ; et al.	2008-01-31
Memory Controller for Daisy Chained Self Timed Memory Chips App 20080028177 - Bartley; Gerald Keith ; et al.	2008-01-31
Memory System Having an Apportionable Data Bus and Daisy Chained Memory Chips App 20080028126 - Bartley; Gerald Keith ; et al.	2008-01-31
Carrier Having Daisy Chain Of Self Timed Memory Chips App 20080028160 - Bartley; Gerald Keith ; et al.	2008-01-31
Computer System Having Daisy Chained Memory Chips App 20080028123 - Bartley; Gerald Keith ; et al.	2008-01-31
Self Timed Memory Chip Having an Apportionable Data Bus App 20080028175 - Bartley; Gerald Keith ; et al.	2008-01-31
Memory Controller For Daisy Chained Memory Chips App 20080028158 - Bartley; Gerald Keith ; et al.	2008-01-31
Memory System Having Self Timed Daisy Chained Memory Chips App 20080028176 - Bartley; Gerald Keith ; et al.	2008-01-31
Method, Structures and Computer Program Product for Implementing Enhanced Wiring Capability for Electronic Laminate Packages App 20070294653 - Bartley; Gerald Keith ; et al.	2007-12-20
Learning a predicted voltage to supply an electronic device based on dynamic voltage variation App 20070208463 - Bartley; Gerald Keith ; et al.	2007-09-06
Method and power control structure for managing plurality of voltage islands App 20070138653 - Bartley; Gerald Keith ; et al.	2007-06-21
Computer system architecture for a processor connected to a high speed bus transceiver Grant 7,234,017 - Biran , et al. June 19, 2	2007-06-19
Stacking method and stacked structure for attaching memory components to associated device App 20070108611 - Bartley; Gerald Keith ; et al.	2007-05-17
Embedded probe-enabling socket with integral probe structures Grant 7,202,685 - Bartley , et al. April 10, 2	2007-04-10
Method, apparatus and computer program product for implementing automated detection excess aggressor shape capacitance coupling in printed circuit board layouts Grant 7,131,084 - Cannon , et al. October 31, 2	2006-10-31
Method, apparatus, and computer program product for implementing vertically coupled noise control through a mesh plane in an electronic package design App 20060236277 - Bartley; Gerald Keith ; et al.	2006-10-19
Computer system architecture App 20060190668 - Biran; Giora ; et al.	2006-08-24
Method and stiffener-embedded waveguide structure for implementing enhanced data transfer Grant 7,088,199 - Bartley , et al. August 8, 2	2006-08-08
Method and structure to control common mode impedance in fan-out regions Grant 7,088,200 - Bartley , et al. August 8, 2	2006-08-08
Socket assembly with incorporated memory structure Grant 7,074,050 - Bartley , et al. July 11, 2	2006-07-11
Method and apparatus for implementing silicon wafer chip carrier passive devices Grant 7,050,871 - Bartley , et al. May 23, 2	2006-05-23
Method and structures for implementing impedance-controlled coupled noise suppressor for differential interface solder column array Grant 7,036,710 - Bartley , et al. May 2, 2	2006-05-02
Method and structure for implementing column attach coupled noise suppressor Grant 7,036,709 - Bartley , et al. May 2, 2	2006-05-02
Method and structure to control common mode impedance in fan-out regions App 20060087379 - Bartley; Gerald Keith ; et al.	2006-04-27
Transmission line bounding models Grant 7,010,768 - Dahlen , et al. March 7, 2	2006-03-07
Method and apparatus for implementing direct attenuation measurement through embedded structure excitation Grant 6,998,852 - Bartley , et al. February 14, 2	2006-02-14
Method and probe structure for implementing a single probe location for multiple signals Grant 6,987,397 - Bartley , et al. January 17, 2	2006-01-17
Method and apparatus for implementing direct attenuation measurement through embedded structure excitation App 20050285600 - Bartley, Gerald Keith ; et al.	2005-12-29
Method and stiffener-embedded waveguide structure for implementing enhanced data transfer App 20050264380 - Bartley, Gerald Keith ; et al.	2005-12-01
Method and structure for implementing enhanced electronic packaging and PCB layout with diagonal vias App 20050251777 - Bartley, Gerald Keith ; et al.	2005-11-10
Method and apparatus for implementing automated electronic package transmission line characteristic impedance verification Grant 6,956,383 - Bartley , et al. October 18, 2	2005-10-18
Method and apparatus for implementing silicon wafer chip carrier passive devices App 20050192691 - Bartley, Gerald Keith ; et al.	2005-09-01
Method, apparatus and computer program product for implementing automated detection excess aggressor shape capacitance coupling in printed circuit board layouts App 20050125752 - Cannon, Todd Arthur ; et al.	2005-06-09
Method and apparatus for implementing automated electronic package transmission line characteristic impedance verification App 20050104602 - Bartley, Gerald Keith ; et al.	2005-05-19
Method and structure for implementing column attach coupled noise suppressor App 20050098607 - Bartley, Gerald Keith ; et al.	2005-05-12
Method and probe structure for implementing a single probe location for multiple signals App 20050077912 - Bartley, Gerald Keith ; et al.	2005-04-14
Transmission line bounding models App 20040261045 - Dahlen, Paul Eric ; et al.	2004-12-23
Via structure for increased wiring on printed wiring boards App 20040251047 - Bartley, Gerald Keith ; et al.	2004-12-16
Method and structure for implementing enhanced differential signal trace routing App 20040189418 - Bartley, Gerald Keith ; et al.	2004-09-30
Method and embedded bus bar structure for implementing power distribution Grant 6,757,175 - Bartley , et al. June 29, 2	2004-06-29

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