loadpatents
name:-0.019456148147583
name:-0.025635004043579
name:-0.00046300888061523
Maule; Warren Edward Patent Filings

Maule; Warren Edward

Patent Applications and Registrations

Patent applications and USPTO patent grants for Maule; Warren Edward.The latest application filed is for "system for error control coding for memories of different types and associated methods".

Company Profile
0.31.22
  • Maule; Warren Edward - Cedar Park TX
  • Maule; Warren Edward - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and system for thread-based memory speculation in a memory subsystem of a data processing system
Grant 8,892,821 - Arimilli , et al. November 18, 2
2014-11-18
Power management of a spare DRAM on a buffered DIMM by issuing a power on/off command to the DRAM device
Grant 8,639,874 - Maule , et al. January 28, 2
2014-01-28
System for error control coding for memories of different types and associated methods
Grant 8,185,800 - Coteus , et al. May 22, 2
2012-05-22
Power management via DIMM read operation limiter
Grant 8,055,922 - Brittain , et al. November 8, 2
2011-11-08
Streaming reads for early processing in a cascaded memory subsystem with buffered memory devices
Grant 7,934,070 - Brittain , et al. April 26, 2
2011-04-26
Double DRAM bit steering for multiple error corrections
Grant 7,840,860 - Alves , et al. November 23, 2
2010-11-23
System for Error Control Coding for Memories of Different Types and Associated Methods
App 20100293436 - Coteus; Paul W. ;   et al.
2010-11-18
Efficient storage of metadata in a system memory
Grant 7,779,292 - Fields, Jr. , et al. August 17, 2
2010-08-17
Memory System having Spare Memory Devices Attached to a Local Interface Bus
App 20100162037 - Maule; Warren Edward ;   et al.
2010-06-24
Power Management of a Spare DRAM on a Buffered DIMM by Issuing a Power On/Off Command to the DRAM Device
App 20100162020 - Maule; Warren Edward ;   et al.
2010-06-24
Using bit errors from memory to alter memory command stream
Grant 7,631,228 - Brittain , et al. December 8, 2
2009-12-08
Executing background writes to idle DIMMS
Grant 7,600,091 - Brittain , et al. October 6, 2
2009-10-06
Double DRAM bit steering for multiple error corrections
Grant 7,523,364 - Alves , et al. April 21, 2
2009-04-21
Programmable bank/timer address folding in memory devices
Grant 7,516,264 - Brittain , et al. April 7, 2
2009-04-07
Memory queue with supplemental locations for consecutive addresses
Grant 7,493,456 - Brittain , et al. February 17, 2
2009-02-17
Power Management Via Dimm Read Operation Limiter
App 20080320323 - Brittain; Mark Andrew ;   et al.
2008-12-25
Data processing system and method for efficient storage of metadata in a system memory
Grant 7,467,323 - Fields, Jr. , et al. December 16, 2
2008-12-16
Double Dram Bit Steering For Multiple Error Corrections
App 20080294950 - Alves; Luiz Carlos ;   et al.
2008-11-27
Power management via DIMM read operation limiter
Grant 7,426,649 - Brittain , et al. September 16, 2
2008-09-16
Dynamic power management via DIMM read operation limiter
Grant 7,421,598 - Brittain , et al. September 2, 2
2008-09-02
Executing background writes to idle DIMMs
Grant 7,373,471 - Brittain , et al. May 13, 2
2008-05-13
Executing Background Writes To Idle Dimms
App 20080091905 - Brittain; Mark Andrew ;   et al.
2008-04-17
Streaming Reads For Early Processing In A Cascaded Memory Subsystem With Buffered Memory Devices
App 20080091906 - Brittain; Mark Andrew ;   et al.
2008-04-17
Method and apparatus for queuing memory access commands in a memory queue of an information handling system
App 20080091881 - Brittain; Mark Andrew ;   et al.
2008-04-17
System and method for using bit errors from memory to alter memory command stream
App 20080072116 - Brittain; Mark Andrew ;   et al.
2008-03-20
Streaming reads for early processing in a cascaded memory subsystem with buffered memory devices
Grant 7,337,293 - Brittain , et al. February 26, 2
2008-02-26
Data Processing System And Method For Efficient Storage Of Metadata In A System Memory
App 20080028156 - Fields; James Stephen JR. ;   et al.
2008-01-31
Method and system for supplier-based memory speculation in a memory subsystem of a data processing system
Grant 7,130,967 - Arimilli , et al. October 31, 2
2006-10-31
Programmable bank/timer address folding in memory devices
App 20060179206 - Brittain; Mark Andrew ;   et al.
2006-08-10
Power management via DIMM read operation limiter
App 20060179333 - Brittain; Mark Andrew ;   et al.
2006-08-10
Data processing system and method for efficient storage of metadata in a system memory
App 20060179248 - Fields; James Stephen JR. ;   et al.
2006-08-10
Dynamic power management via DIMM read operation limiter
App 20060179334 - Brittain; Mark Andrew ;   et al.
2006-08-10
Double DRAM bit steering for multiple error corrections
App 20060179362 - Alves; Luiz Carlos ;   et al.
2006-08-10
Streaming reads for early processing in a cascaded memory subsystem with buffered memory devices
App 20060179262 - Brittain; Mark Andrew ;   et al.
2006-08-10
Executing background writes to idle DIMMs
App 20060179213 - Brittain; Mark Andrew ;   et al.
2006-08-10
Single burst completion of multiple writes at buffered DIMMs
App 20060179183 - Brittain; Mark Andrew ;   et al.
2006-08-10
Method and system for thread-based memory speculation in a memory subsystem of a data processing system
App 20050132148 - Arimilli, Ravi Kumar ;   et al.
2005-06-16
Method and system for supplier-based memory speculation in a memory subsystem of a data processing system
App 20050132147 - Arimilli, Ravi Kumar ;   et al.
2005-06-16
Dram with memory independent burst lengths for reads versus writes
Grant 6,675,270 - Arimilli , et al. January 6, 2
2004-01-06
Sequencing data on a shared data bus via a memory buffer to prevent data overlap during multiple memory read operations
Grant 6,622,222 - Arimilli , et al. September 16, 2
2003-09-16
Method and apparatus for high performance transmission of ordered packets on a bus within a data processing system
Grant 6,581,116 - Arimilli , et al. June 17, 2
2003-06-17
Dram with memory independent burst lengths for reads versus writes
App 20020161966 - Arimilli, Ravi Kumar ;   et al.
2002-10-31
Speculative dram reads with cancel data mechanism
App 20020161979 - Arimilli, Ravi Kumar ;   et al.
2002-10-31
Clustered, buffered simms and assemblies thereof
Grant 6,276,844 - Coteus , et al. August 21, 2
2001-08-21
Information handling system including non-disruptive command and data movement between storage and one or more auxiliary processors
Grant 6,226,695 - Kaiser , et al. May 1, 2
2001-05-01
Handling interrupts by returning and requeuing currently executing interrupts for later resubmission when the currently executing interrupts are of lower priority than newly generated pending interrupts
Grant 6,061,757 - Arimilli , et al. May 9, 2
2000-05-09
Method for isolating faults on a clocked synchronous bus
Grant 5,954,825 - Kaiser , et al. September 21, 1
1999-09-21
Computer system memory controller and method of burst data ordering translation
Grant 5,915,126 - Maule , et al. June 22, 1
1999-06-22
Method and apparatus for data ordering of I/O transfers in Bi-modal Endian PowerPC systems
Grant 5,898,896 - Kaiser , et al. April 27, 1
1999-04-27
System for transferring data from a source device to a target device in which the address of data movement engine is determined
Grant 5,765,022 - Kaiser , et al. June 9, 1
1998-06-09
Information handling system including doze mode control
Grant 5,713,029 - Kaiser , et al. January 27, 1
1998-01-27

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