| Patent | Date |
|---|
Fast Fourier Transform (FFT) Based Digital Signal Processing (DSP) Engine
App 20220014199 - Mauer; Volker | 2022-01-13 |
Methods and apparatus for performing buffer fill level controlled dynamic power scaling
Grant 10,136,384 - Mauer November 20, 2 | 2018-11-20 |
Flexible input structure for arithmetic processing block
Grant 10,003,341 - Mauer June 19, 2 | 2018-06-19 |
Pipelined systolic finite impulse response filter
Grant 9,966,933 - Mauer , et al. May 8, 2 | 2018-05-08 |
Dynamically programmable digital signal processing blocks for finite-impulse-response filters
Grant 9,748,928 - Mauer August 29, 2 | 2017-08-29 |
Methods and apparatus for implementing feedback loops
Grant 9,660,624 - Safari , et al. May 23, 2 | 2017-05-23 |
Multi-standard peak canceling circuitry
Grant 9,485,129 - Cope , et al. November 1, 2 | 2016-11-01 |
Dynamically programmable digital signal processing blocks for finite-impulse-response filters
Grant 9,438,203 - Mauer September 6, 2 | 2016-09-06 |
Pipelined systolic finite impulse response filter
Grant 9,379,687 - Mauer , et al. June 28, 2 | 2016-06-28 |
Methods and apparatus for adjusting transmit signal clipping thresholds
Grant 9,337,782 - Mauer , et al. May 10, 2 | 2016-05-10 |
Methods and apparatus for performing digital predistortion using time domain and frequency domain alignment
Grant 9,036,734 - Mauer , et al. May 19, 2 | 2015-05-19 |
Matrix operations in an integrated circuit device
Grant 8,959,136 - Cheung , et al. February 17, 2 | 2015-02-17 |
Resource sharing in decoder architectures
Grant 8,914,716 - Mauer , et al. December 16, 2 | 2014-12-16 |
QR decomposition in an integrated circuit device
Grant 8,812,576 - Mauer August 19, 2 | 2014-08-19 |
Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry
Grant 8,751,551 - Streicher , et al. June 10, 2 | 2014-06-10 |
Modular Digital Signal Processing Circuitry With Optionally Usable, Dedicated Connections Between Modules Of The Circuitry
App 20140082035 - Streicher; Keone ; et al. | 2014-03-20 |
Programmable device with specialized multiplier blocks
Grant 08620980 - | 2013-12-31 |
Programmable device with specialized multiplier blocks
Grant 8,620,980 - Mauer , et al. December 31, 2 | 2013-12-31 |
Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry
Grant 08620977 - | 2013-12-31 |
Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry
Grant 8,620,977 - Streicher , et al. December 31, 2 | 2013-12-31 |
Modular Digital Signal Processing Circuitry With Optionally Usable, Dedicated Connections Between Modules Of The Circuitry
App 20130332497 - Streicher; Keone ; et al. | 2013-12-12 |
Configuring a CIC filter in a programmable integrated circuit device
Grant 8,583,715 - Pan , et al. November 12, 2 | 2013-11-12 |
Priming of metrics used by convolutional decoders
Grant 8,578,255 - Pan , et al. November 5, 2 | 2013-11-05 |
Avoiding interleaver memory conflicts
Grant 8,572,456 - Pan , et al. October 29, 2 | 2013-10-29 |
Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry
Grant 8,549,055 - Streicher , et al. October 1, 2 | 2013-10-01 |
Specialized processing block for programmable integrated circuit device
Grant 8,543,634 - Xu , et al. September 24, 2 | 2013-09-24 |
Method for configuring a finite impulse response filter in a programmable logic device
Grant 8,386,550 - Mauer , et al. February 26, 2 | 2013-02-26 |
Data resequencing
Grant 8,291,291 - Pan , et al. October 16, 2 | 2012-10-16 |
Peak windowing for crest factor reduction
Grant 8,005,177 - Mauer , et al. August 23, 2 | 2011-08-23 |
Efficient rounding circuits and methods in configurable integrated circuit devices
Grant 7,948,267 - Mauer , et al. May 24, 2 | 2011-05-24 |
Combined interpolation and decimation filter for programmable logic device
Grant 7,814,137 - Mauer October 12, 2 | 2010-10-12 |
Modular Digital Signal Processing Circuitry With Optionally Usable, Dedicated Connections Between Modules Of The Circuitry
App 20100228806 - Streicher; Keone ; et al. | 2010-09-09 |
Adaptive sampling rate converter
Grant 7,680,233 - Mauer March 16, 2 | 2010-03-16 |
Resource Sharing In Decoder Architectures
App 20090228768 - Mauer; Volker ; et al. | 2009-09-10 |
Peak windowing for crest factor reduction
Grant 7,586,995 - Mauer , et al. September 8, 2 | 2009-09-08 |
Adaptive sampling rate converter
Grant 7,369,637 - Mauer May 6, 2 | 2008-05-06 |
Method and apparatus for implementing a multiple constraint length Viterbi decoder
Grant 7,260,154 - Mauer , et al. August 21, 2 | 2007-08-21 |
Numerically controlled oscillator and method for operating the same
Grant 7,095,349 - Mauer August 22, 2 | 2006-08-22 |
Method and apparatus for implementing a two dimensional correlator
Grant 7,039,091 - Mauer May 2, 2 | 2006-05-02 |
Method to compensate for memory effect in lookup table based digital predistorters
Grant 6,998,909 - Mauer February 14, 2 | 2006-02-14 |
Method and apparatus for extracting data from an oversampled bit stream
Grant 6,944,577 - Mauer , et al. September 13, 2 | 2005-09-13 |
Method and apparatus for implementing a multi-step pseudo random sequence generator
Grant 6,910,056 - Mauer June 21, 2 | 2005-06-21 |
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