loadpatents
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name:-0.015626192092896
name:-0.00085902214050293
Matsunaga; Hayami Patent Filings

Matsunaga; Hayami

Patent Applications and Registrations

Patent applications and USPTO patent grants for Matsunaga; Hayami.The latest application filed is for "modulation/demodulation apparatus using matrix and anti-matrix".

Company Profile
0.10.3
  • Matsunaga; Hayami - Osaka JP
  • Matsunaga; Hayami - Hirakata JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Modulation/demodulation apparatus using matrix and anti-matrix
Grant 7,408,997 - Matsunaga August 5, 2
2008-08-05
Circuit substrate and apparatus including the circuit substrate
Grant 7,358,445 - Mohri , et al. April 15, 2
2008-04-15
Multilayer ceramic substrate utilizing an intaglio plate with a plurality of grooves having different depths
Grant 6,861,744 - Hayama , et al. March 1, 2
2005-03-01
Modulation/demodulation apparatus using matrix and anti-matrix
App 20040258169 - Matsunaga, Hayami
2004-12-23
Method for fabricating a multilayer ceramic substrate
Grant 6,429,114 - Hayama , et al. August 6, 2
2002-08-06
Method for fabricating a multilayer ceramic substrate
App 20020100966 - Hayama, Masaaki ;   et al.
2002-08-01
Method for fabricating a multilayer ceramic substrate
App 20020094604 - Hayama, Masaaki ;   et al.
2002-07-18
Method of manufacturing ceramic substrate
Grant 6,374,733 - Hayama , et al. April 23, 2
2002-04-23
Integrated circuit device on metal board with CPU power converter
Grant 6,303,989 - Yasuho , et al. October 16, 2
2001-10-16
Method of manufacturing a packaging substrate
Grant 6,132,543 - Mohri , et al. October 17, 2
2000-10-17
Multilevel semiconductor integrated circuit device
Grant 5,742,097 - Matsunaga , et al. April 21, 1
1998-04-21
Multilevel semiconductor integrated circuit device
Grant 5,652,462 - Matsunaga , et al. July 29, 1
1997-07-29
Semiconductor integrated circuit module and a semiconductor integrated circuit device stacking the same
Grant 5,490,041 - Furukawa , et al. February 6, 1
1996-02-06

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