Matsui; Masataka
Patent Applications and Registrations
Patent applications and USPTO patent grants for Matsui; Masataka.The latest application filed is for "semiconductor device and system".
- Matsui; Masataka - Yokohama JP
- Matsui; Masataka - Yokohama-shi JP
- Matsui; Masataka - San Jose CA
- Matsui; Masataka - Tokyo JP
| Patent | Date |
|---|---|
| Semiconductor device and system Grant 7,487,370 - Shiratake , et al. February 3, 2 | 2009-02-03 |
| Semiconductor device and system App 20060271799 - Shiratake; Shinichiro ; et al. | 2006-11-30 |
| Static random access memory including potential control means for writing data in memory cell and write method for memory cell Grant 6,011,713 - Yamane , et al. January 4, 2 | 2000-01-04 |
| Semiconductor memory device composed of half cells Grant 5,965,922 - Matsui October 12, 1 | 1999-10-12 |
| Semiconductor memory device having two P-well layout structure Grant 5,930,163 - Hara , et al. July 27, 1 | 1999-07-27 |
| Semiconductor device having bipolar transistor and MOS transistor Grant 5,512,772 - Maeda , et al. April 30, 1 | 1996-04-30 |
| Static random access memory capable of preventing erroneous writing Grant 5,357,479 - Matsui October 18, 1 | 1994-10-18 |
| Static memory device Grant 5,309,401 - Suzuki , et al. May 3, 1 | 1994-05-03 |
| Semiconductor device having identification region for carrying out failure analysis Grant 5,294,812 - Hashimoto , et al. March 15, 1 | 1994-03-15 |
| Static random access memory including stress test circuitry Grant 5,276,647 - Matsui , et al. January 4, 1 | 1994-01-04 |
| TTL to CMOS input buffer using CMOS structure Grant 5,268,599 - Matsui December 7, 1 | 1993-12-07 |
| Static memory cell Grant 5,239,501 - Matsui , et al. August 24, 1 | 1993-08-24 |
| Semiconductor memory having an operation margin against a write recovery time Grant 5,091,889 - Hamano , et al. February 25, 1 | 1992-02-25 |
| Band-gap type voltage generating circuit for an ECL circuit Grant 5,049,806 - Urakawa , et al. September 17, 1 | 1991-09-17 |
| CMOS static memory Grant 5,010,521 - Matsui April 23, 1 | 1991-04-23 |
| Logic level converting circuit Grant 4,992,681 - Urakawa , et al. February 12, 1 | 1991-02-12 |
| Static semiconductor memory with section and block sense amplifiers Grant 4,931,994 - Matsui , et al. June 5, 1 | 1990-06-05 |
| Static random access memory with address transition detector Grant 4,922,461 - Hayakawa , et al. May 1, 1 | 1990-05-01 |
| Internal synchronization type MOS SRAM with address transition detecting circuit Grant 4,916,668 - Matsui April 10, 1 | 1990-04-10 |
| Static random access memory Grant 4,901,284 - Ochii , et al. February 13, 1 | 1990-02-13 |
| Semiconductor memory device using partial decoders for redundancy Grant 4,881,202 - Tsujimoto , et al. November 14, 1 | 1989-11-14 |
| Static memory using a MIS field effect transistor Grant 4,815,040 - Matsui , et al. March 21, 1 | 1989-03-21 |
| Static memory with pull-up circuit for pulling-up a potential on a bit line Grant 4,813,022 - Matsui , et al. March 14, 1 | 1989-03-14 |
| Bi-CMOS logic circuit Grant 4,740,718 - Matsui April 26, 1 | 1988-04-26 |
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