Matranga; Giovanni

Patent Applications and Registrations

Patent applications and USPTO patent grants for Matranga; Giovanni.The latest application filed is for "methods and devices for erasing non-volatile memory".

Company Profile

0.12.10

Matranga; Giovanni - Catania IT
Matranga; Giovanni - Catania ct

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods and devices for wear leveling Grant 11,328,778 - Lo Giudice , et al. May 10, 2	2022-05-10
Methods and Devices for Erasing Non-Volatile Memory App 20220044743 - Matranga; Giovanni ; et al.	2022-02-10
Methods And Devices For Wear Leveling App 20220011943 - Lo Giudice; Gianbattista ; et al.	2022-01-13
Methods and devices for erasing non-volatile memory Grant 11,183,255 - Matranga , et al. November 23, 2	2021-11-23
Method for reducing a memory operation time in a non-volatile memory device and corresponding non-volatile memory device Grant 10,147,490 - Grande , et al. De	2018-12-04
Method For Reducing A Memory Operation Time In A Non-volatile Memory Device And Corresponding Non-volatile Memory Device App 20180151231 - Grande; Francesca ; et al.	2018-05-31
Managing of the erasing of operative pages of a flash memory device through service pages Grant 9,240,243 - Matranga , et al. January 19, 2	2016-01-19
Voltage regulator Grant 8,902,678 - Dimartino , et al. December 2, 2	2014-12-02
Dynamic biasing circuit for a protection stage using low voltage transistors Grant 8,604,868 - Ucciardello , et al. December 10, 2	2013-12-10
Managing Of The Erasing Of Operative Pages Of A Flash Memory Device Through Service Pages App 20130272068 - Matranga; Giovanni ; et al.	2013-10-17
Dynamic Biasing Circuit For A Protection Stage Using Low Voltage Transistors App 20120274393 - Ucciardello; Carmelo ; et al.	2012-11-01
Voltage Regulator App 20120218837 - DIMARTINO; Alberto Jose' ; et al.	2012-08-30
Electronic circuit for generating low voltage and high frequency phases in a charge pump Grant 8,063,693 - Conte , et al. November 22, 2	2011-11-22
Biasing circuit for EEPROM memories with shared latches Grant 7,742,342 - Conte , et al. June 22, 2	2010-06-22
Electronic Circuit For Generating Low Voltage And High Frequency Phases In A Charge Pump App 20100127760 - CONTE; ANTONINO ; et al.	2010-05-27
Charge pump system and corresponding method for managing voltage generation Grant 7,576,591 - Conte , et al. August 18, 2	2009-08-18
Biasing circuit for EEPROM memories with shared latches App 20080101125 - Conte; Antonino ; et al.	2008-05-01
Charge Pump System And Corresponding Method For Managing Voltage Generation App 20080018383 - CONTE; ANTONINO ; et al.	2008-01-24
CMOS temperature sensor Grant 6,489,831 - Matranga , et al. December 3, 2	2002-12-03
Reading circuit for a memory cell App 20020122333 - Conte, Antonino ; et al.	2002-09-05

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