MATHEW; LEO

Patent Applications and Registrations

Patent applications and USPTO patent grants for MATHEW; LEO.The latest application filed is for "structures and methods of fabricating electronic devices using separation and charge depletion techniques".

Company Profile

1.67.67

MATHEW; LEO - AUSTIN TX
Mathew; Leo - Chandler AZ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Structures And Methods Of Fabricating Electronic Devices Using Separation And Charge Depletion Techniques App 20220020645 - MATHEW; LEO ; et al.	2022-01-20
Multiple device types including an inverted-T channel transistor and method therefor Grant 8,643,066 - Min , et al. February 4, 2	2014-02-04
Phase change memory cell with heater and method therefor Grant 8,575,588 - Mathew , et al. November 5, 2	2013-11-05
Method of making a phase change memory cell having a silicide heater in conjunction with a FinFET Grant 8,563,355 - Mathew , et al. October 22, 2	2013-10-22
Method of making an inverted-T channel transistor Grant 8,513,066 - Mathew , et al. August 20, 2	2013-08-20
Two-transistor floating-body dynamic memory cell Grant 8,498,140 - Fossum , et al. July 30, 2	2013-07-30
Method to improve source/drain parasitics in vertical devices Grant 8,258,035 - Mathew , et al. September 4, 2	2012-09-04
Method Of Forming An Electronic Device Using A Separation Technique App 20120045866 - Mathew; Leo ; et al.	2012-02-23
Phase Change Memory Cell With Heater And Method Therefor App 20120007031 - MATHEW; LEO ; et al.	2012-01-12
Integrated circuit using FinFETs and having a static random access memory (SRAM) Grant 8,088,657 - Burnett , et al. January 3, 2	2012-01-03
Method of forming an electronic device using a separation technique Grant 8,076,215 - Mathew , et al. December 13, 2	2011-12-13
Phase change memory cell with heater and method therefor Grant 8,043,888 - Mathew , et al. October 25, 2	2011-10-25
Semiconductor fabrication process including silicide stringer removal processing Grant 7,998,822 - Jawarani , et al. August 16, 2	2011-08-16
Method of forming a finFET and structure Grant 7,910,482 - Stephens , et al. March 22, 2	2011-03-22
Two-Transistor Floating-Body Dynamic Memory Cell App 20100329043 - Fossum; Jerry G. ; et al.	2010-12-30
Semiconductor structure pattern formation Grant 7,829,447 - Mathew , et al. November 9, 2	2010-11-09
Light erasable memory and method therefor Grant 7,820,491 - Rao , et al. October 26, 2	2010-10-26
MIGFET circuit with ESD protection Grant 7,817,387 - Khazhinsky , et al. October 19, 2	2010-10-19
FinFET memory cell having a floating gate and method therefor Grant 7,811,889 - Trivedi , et al. October 12, 2	2010-10-12
Twisted dual-substrate orientation (DSO) substrates Grant 7,803,670 - White , et al. September 28, 2	2010-09-28
Integrated Circuit Using Finfets And Having A Static Random Access Memory (sram) App 20100230762 - Burnett; James D. ; et al.	2010-09-16
Method Of Forming An Electronic Device Using A Separation Technique App 20100227475 - Mathew; Leo ; et al.	2010-09-09
Integrated circuit using FinFETs and having a static random access memory (SRAM) Grant 7,754,560 - Burnett , et al. July 13, 2	2010-07-13
Method of forming an electronic device using a separation-enhancing species Grant 7,749,884 - Mathew , et al. July 6, 2	2010-07-06
Process of forming an electronic device including forming a gate electrode layer and forming a patterned masking layer Grant 7,737,018 - Mathew , et al. June 15, 2	2010-06-15
Method of forming a semiconductor device having a removable sidewall spacer Grant 7,727,829 - Trivedi , et al. June 1, 2	2010-06-01
Process for forming an electronic device including a fin-type structure Grant 7,709,303 - Burnett , et al. May 4, 2	2010-05-04
Method Of Forming A Finfet And Structure App 20090294919 - Stephens; Tab A. ; et al.	2009-12-03
Method Of Forming An Electronic Device Using A Separation Technique App 20090286393 - Mathew; Leo ; et al.	2009-11-19
Method Of Forming An Electronic Device Using A Separation-enhancing Species App 20090280635 - Mathew; Leo ; et al.	2009-11-12
Method Of Forming An Electronic Device Including Removing A Differential Etch Layer App 20090280588 - Mathew; Leo ; et al.	2009-11-12
Phase detector device and method thereof Grant 7,612,619 - Moosa , et al. November 3, 2	2009-11-03
Method to control uniformity/composition of metal electrodes, silicides on topography and devices using this method Grant 7,611,936 - Mathew , et al. November 3, 2	2009-11-03
Asymmetric spacers and asymmetric source/drain extension layers Grant 7,585,735 - Mathew , et al. September 8, 2	2009-09-08
Electronic device including a gated diode Grant 7,573,114 - Mathew , et al. August 11, 2	2009-08-11
Electronic device including a semiconductor fin having a plurality of gate electrodes and a process for forming the electronic device Grant 7,566,623 - Mathew , et al. July 28, 2	2009-07-28
Phase Change Memory Cell With Heater And Method Therefor App 20090184309 - Mathew; Leo ; et al.	2009-07-23
Phase Change Memory Cell With Finfet And Method Therefor App 20090184306 - Mathew; Leo ; et al.	2009-07-23
Migfet Circuit With Esd Protection App 20090174973 - Khazhinsky; Michael G. ; et al.	2009-07-09
Semiconductor optical devices having fin structures Grant 7,521,720 - Mathew , et al. April 21, 2	2009-04-21
Semiconductor Fabrication Process Including Silicide Stringer Removal Processing App 20090093108 - Jawarani; Dharmesh ; et al.	2009-04-09
Process of forming a non-volatile memory cell including a capacitor structure Grant 7,504,302 - Mathew , et al. March 17, 2	2009-03-17
Semiconductor optical devices and method for forming Grant 7,494,832 - Mathew , et al. February 24, 2	2009-02-24
Finfet Memory Cell Having A Floating Gate And Method Therefor App 20090039420 - Trivedi; Vishal P. ; et al.	2009-02-12
Multiple Device Types Including An Inverted-t Channel Transistor And Method Therefor App 20090039418 - Min; Byoung W. ; et al.	2009-02-12
Split game memory cell method Grant 7,479,429 - Rao , et al. January 20, 2	2009-01-20
Hybrid-FET and its application as SRAM Grant 7,470,951 - Mathew , et al. December 30, 2	2008-12-30
Electronic Device Including A Gated Diode App 20080315315 - Mathew; Leo ; et al.	2008-12-25
Multiple device types including an inverted-T channel transistor and method therefor Grant 7,452,768 - Min , et al. November 18, 2	2008-11-18
Method to control uniformity/composition of metal electrodes, silicides on topography and devices using this method App 20080280429 - Mathew; Leo ; et al.	2008-11-13
Method to improve source/drain parasitics in vertical devices App 20080274600 - Mathew; Leo ; et al.	2008-11-06
Semiconductor fabrication process including silicide stringer removal processing Grant 7,446,006 - Jawarani , et al. November 4, 2	2008-11-04
Method for forming a semiconductor-on-insulator (SOI) body-contacted device with a portion of drain region removed Grant 7,446,001 - Mathew , et al. November 4, 2	2008-11-04
Temperature compensation device and method thereof Grant 7,439,791 - Moosa , et al. October 21, 2	2008-10-21
Electronic device and a process for forming the electronic device Grant 7,432,122 - Mathew , et al. October 7, 2	2008-10-07
Method of separating a structure in a semiconductor device Grant 7,427,549 - Mathew , et al. September 23, 2	2008-09-23
Process Of Forming An Electronic Device Including Forming A Gate Electrode Layer And Forming A Patterned Masking Layer App 20080188067 - Mathew; Leo ; et al.	2008-08-07
Electronic Device Including A Semiconductor Fin Having A Plurality Of Gate Electrodes And A Process For Forming The Electronic Device App 20080185654 - Mathew; Leo ; et al.	2008-08-07
Method Of Forming A Semiconductor Device Having A Removable Sidewall Spacer App 20080188068 - Trivedi; Vishal P. ; et al.	2008-08-07
Split Gate Memory Cell Method App 20080182375 - Rao; Rajesh ; et al.	2008-07-31
Method Of Forming A Semiconductor Device Having A Symmetric Dielectric Regions And Structure Thereof App 20080173957 - Mathew; Leo ; et al.	2008-07-24
Light Erasable Memory And Method Therefor App 20080164512 - Rao; Rajesh A. ; et al.	2008-07-10
Method of forming a semiconductor device with decreased undercutting of semiconductor material Grant 7,323,373 - Mathew , et al. January 29, 2	2008-01-29
Twisted Dual-Substrate Orientation (DSO) Substrates App 20080020515 - White; Ted R. ; et al.	2008-01-24
Integrated circuit with multiple independent gate field effect transistor (MIGFET) rail clamp circuit Grant 7,301,741 - Khazhinsky , et al. November 27, 2	2007-11-27
Semiconductor Structure Pattern Formation App 20070269969 - Mathew; Leo ; et al.	2007-11-22
Method of forming a semiconductor device having asymmetric dielectric regions and structure thereof Grant 7,282,426 - Mathew , et al. October 16, 2	2007-10-16
Method Of Separating A Structure In A Semiconductor Device App 20070238278 - Mathew; Leo ; et al.	2007-10-11
Voltage controlled oscillator with a multiple gate transistor and method therefor Grant 7,279,997 - Kalpat , et al. October 9, 2	2007-10-09
Phase detector device and method thereof App 20070223636 - Moosa; Mohamed S. ; et al.	2007-09-27
Semiconductor Optical Devices And Method For Forming App 20070205421 - Mathew; Leo ; et al.	2007-09-06
Multiple fin formation Grant 7,265,059 - Rao , et al. September 4, 2	2007-09-04
Method and apparatus for forming a semiconductor-on-insulator (SOI) body-contacted device App 20070181946 - Mathew; Leo ; et al.	2007-08-09
Temperature compensation device and method thereof App 20070176669 - Moosa; Mohamed S. ; et al.	2007-08-02
Method of forming a semiconductor device with decreased undercutting of semiconductor material App 20070172996 - Mathew; Leo ; et al.	2007-07-26
Process for forming an electronic device including a fin-type structure App 20070161171 - Burnett; James D. ; et al.	2007-07-12
Electronic device and a process for forming the electronic device App 20070158703 - Mathew; Leo ; et al.	2007-07-12
Integrated circuit using FinFETs and having a static random access memory (SRAM) App 20070158730 - Burnett; James D. ; et al.	2007-07-12
Semiconductor device having nano-pillars and method therefor Grant 7,241,695 - Mathew , et al. July 10, 2	2007-07-10
Semiconductor device having conductive spacers in sidewall regions and method for forming Grant 7,238,601 - Mathew , et al. July 3, 2	2007-07-03
Semiconductor Optical Devices And Method For Forming App 20070126076 - Mathew; Leo ; et al.	2007-06-07
Signal converters with multiple gate devices Grant 7,215,268 - Moosa , et al. May 8, 2	2007-05-08
Method of making an inverted-T channel transistor App 20070093010 - Mathew; Leo ; et al.	2007-04-26
Multiple device types including an inverted-T channel transistor and method therefor App 20070093054 - Min; Byoung W. ; et al.	2007-04-26
Signal Converters With Multiple Gate Devices App 20070085721 - Moosa; Mohamed S. ; et al.	2007-04-19
Voltage controlled oscillator with a multiple gate transistor and method therefor App 20070085153 - Kalpat; Sriram S. ; et al.	2007-04-19
Semiconductor device having nano-pillars and method therefor App 20070082495 - Mathew; Leo ; et al.	2007-04-12
Multiple fin formation App 20070077743 - Rao; Rajesh A. ; et al.	2007-04-05
Transistor with independent gate structures Grant 7,192,876 - Mathew , et al. March 20, 2	2007-03-20
Semiconductor fabrication process including silicide stringer removal processing App 20070059911 - Jawarani; Dharmesh ; et al.	2007-03-15
Integrated circuit with multiple independent gate field effect transistor (MIGFET) rail clamp circuit App 20060262469 - Khazhinsky; Michael G. ; et al.	2006-11-23
Non-volatile memory cell including a capacitor structure and processes for forming the same App 20060220102 - Mathew; Leo ; et al.	2006-10-05
Method of forming a semiconductor device having asymmetric dielectric regions and structure thereof App 20060223335 - Mathew; Leo ; et al.	2006-10-05
Semiconductor optical devices and method for forming Grant 7,112,455 - Mathew , et al. September 26, 2	2006-09-26
Transistor having multiple channels Grant 7,112,832 - Orlowski , et al. September 26, 2	2006-09-26
Semiconductor fabrication process with asymmetrical conductive spacers Grant 7,109,550 - Mathew , et al. September 19, 2	2006-09-19
Vertical transistor NVM with body contact structure and method App 20060197140 - Muralidhar; Ramachandran ; et al.	2006-09-07
Transistor having three electrically isolated electrodes and method of formation Grant 7,098,502 - Mathew , et al. August 29, 2	2006-08-29
Asymmetric spacers and asymmetric source/drain extension layers App 20060170016 - Mathew; Leo ; et al.	2006-08-03
Hybrid-fet and its application as sram App 20060170066 - Mathew; Leo ; et al.	2006-08-03
Transistor with vertical dielectric structure Grant 7,018,876 - Mathew , et al. March 28, 2	2006-03-28
Semiconductor device having conductive spacers in sidewall regions and method for forming App 20060057792 - Mathew; Varughese ; et al.	2006-03-16
Method for converting a planar transistor design to a vertical double gate transistor design Grant 7,013,447 - Mathew , et al. March 14, 2	2006-03-14
Method of making a double gate semiconductor device with self-aligned gates and structure thereof App 20060022264 - Mathew; Leo ; et al.	2006-02-02
Transistor with vertical dielectric structure App 20050282345 - Mathew, Leo ; et al.	2005-12-22
Semiconductor optical devices and method for forming App 20050277211 - Mathew, Leo ; et al.	2005-12-15
Method and circuit for multiplying signals with a transistor having more than one independent gate structure Grant 6,969,656 - Du , et al. November 29, 2	2005-11-29
Semiconductor fabrication process with asymmetrical conductive spacers Grant 6,967,143 - Mathew , et al. November 22, 2	2005-11-22
Confined spacers for double gate transistor semiconductor fabrication process Grant 6,951,783 - Mathew , et al. October 4, 2	2005-10-04
Transistor having multiple channels App 20050167650 - Orlowski, Marius K. ; et al.	2005-08-04
Method of forming a transistor having multiple channels Grant 6,921,700 - Orlowski , et al. July 26, 2	2005-07-26
Semiconductor fabrication process with asymmetrical conductive spacers App 20050124130 - Mathew, Leo ; et al.	2005-06-09
Method and circuit for multiplying signals with a transistor having more than one independent gate structure App 20050124120 - Du, Yang ; et al.	2005-06-09
Memory with charge storage locations and adjacent gate structures Grant 6,903,967 - Mathew , et al. June 7, 2	2005-06-07
Transistor having three electrically isolated electrodes and method of formation App 20050098822 - Mathew, Leo ; et al.	2005-05-12
Confined Spacers For Double Gate Transistor Semiconductor Fabrication Process App 20050101069 - Mathew, Leo ; et al.	2005-05-12
Memory With Charge Storage Locations And Adjacent Gate Structures App 20050057964 - Mathew, Leo ; et al.	2005-03-17
Method of forming a transistor having multiple channels and structure thereof App 20050023619 - Orlowski, Marius K. ; et al.	2005-02-03
Method for converting a planar transistor design to a vertical double gate transistor design App 20050020015 - Mathew, Leo ; et al.	2005-01-27
Method for forming a double-gated semiconductor device Grant 6,838,322 - Pham , et al. January 4, 2	2005-01-04
Integrated circuit having multiple memory types and method of formation Grant 6,831,310 - Mathew , et al. December 14, 2	2004-12-14
Transistor with independent gate structures App 20040235300 - Mathew, Leo ; et al.	2004-11-25
Method For Forming A Double-gated Semiconductor Device App 20040219722 - Pham, Daniel T. ; et al.	2004-11-04
Semiconductor fabrication process with asymmetrical conductive spacers App 20040217392 - Mathew, Leo ; et al.	2004-11-04
Multiple gate transistor employing monocrystalline silicon walls Grant 6,753,216 - Mathew , et al. June 22, 2	2004-06-22
Multiple Gate Transistor Employing Monocrystalline Silicon Walls App 20040084674 - Mathew, Leo ; et al.	2004-05-06
Vertical MOSFET with asymmetric gate structure Grant 6,686,245 - Mathew , et al. February 3, 2	2004-02-03
Method of forming a vertical double gate semiconductor device and structure thereof App 20030151077 - Mathew, Leo ; et al.	2003-08-14
Method of making a power switching trench MOSFET having aligned source regions Grant 5,897,343 - Mathew , et al. April 27, 1	1999-04-27

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