loadpatents
name:-0.035130977630615
name:-0.020287036895752
name:-0.0069332122802734
Mathew; James Patent Filings

Mathew; James

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mathew; James.The latest application filed is for "integrated structures and methods of forming integrated structures".

Company Profile
5.23.25
  • Mathew; James - Boise ID
  • Mathew; James - Bellemead NJ
  • Mathew; James - Belle Mead NJ
  • Mathew; James - Evanston IL
  • Mathew; James - Ballemead NJ
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Integrated structures and methods of forming integrated structures
Grant 11,195,854 - Li , et al. December 7, 2
2021-12-07
Slit stress modulation in semiconductor substrates
Grant 10,784,144 - Mathew , et al. Sept
2020-09-22
Integrated Structures and Methods of Forming Integrated Structures
App 20200176471 - Li; Jie ;   et al.
2020-06-04
Integrated structures and methods of forming integrated structures
Grant 10,580,792 - Li , et al.
2020-03-03
Method and apparatus for reducing capacitance of input/output pins of memory device
Grant 10,453,829 - Carlson , et al. Oc
2019-10-22
Autonomous, closed-loop and adaptive simulated annealing based machine learning approach for intelligent analytics-assisted self-organizing-networks (SONs)
Grant 10,327,159 - Tan , et al.
2019-06-18
Method And Apparatus For Reducing Capacitance Of Input/output Pins Of Memory Device
App 20180366453 - Carlson; Merri Lyn ;   et al.
2018-12-20
Integrated Structures and Methods of Forming Integrated Structures
App 20180358378 - Li; Jie ;   et al.
2018-12-13
Integrated structures and methods of forming integrated structures
Grant 10,083,984 - Li , et al. September 25, 2
2018-09-25
Slit Stress Modulation In Semiconductor Substrates
App 20180174890 - Mathew; James ;   et al.
2018-06-21
Slit stress modulation in semiconductor substrates
Grant 9,935,000 - Mathew , et al. April 3, 2
2018-04-03
Integrated Structures and Methods of Forming Integrated Structures
App 20170365617 - Li; Jie ;   et al.
2017-12-21
Integrated structures and methods of forming integrated structures
Grant 9,773,805 - Li , et al. September 26, 2
2017-09-26
Slit Stress Modulation In Semiconductor Substrates
App 20170250108 - Mathew; James ;   et al.
2017-08-31
Predicting Network Performance
App 20170034720 - Gopalakrishnan; Nandu ;   et al.
2017-02-02
Methods For Defining And Predicting Immune Response To Allograft
App 20160340729 - Emerson; Ryan O. ;   et al.
2016-11-24
Forming air gaps in memory arrays and memory arrays with air gaps thus formed
Grant 9,397,210 - Mathew , et al. July 19, 2
2016-07-19
Autonomous, Closed-Loop and Adaptive Simulated Annealing Based Machine Learning Approach for Intelligent Analytics-Assisted Self-Organizing-Networks (SONs)
App 20160162783 - Tan; Yongxi ;   et al.
2016-06-09
Analytics assisted self-organizing-network (SON) for coverage capacity optimization (CCO)
App 20160165472 - Gopalakrishnan; Nandu ;   et al.
2016-06-09
Small cell configuration and maintenance in mobile terminals
Grant 9,094,859 - Khalil , et al. July 28, 2
2015-07-28
Small Cell Configuration And Maintenance In Mobile Terminals
App 20150105068 - KHALIL; Mohamed ;   et al.
2015-04-16
Mobile terminal for small cell configuration and maintenance
Grant 8,948,740 - Khalil , et al. February 3, 2
2015-02-03
Source/drain zones with a delectric plug over an isolation region between active regions and methods
Grant 8,907,396 - Hopkins , et al. December 9, 2
2014-12-09
Forming Air Gaps In Memory Arrays And Memory Arrays With Air Gaps Thus Formed
App 20140027832 - Mathew; James ;   et al.
2014-01-30
Mobile Terminal For Small Cell Configuration And Maintenance
App 20130331088 - KHALIL; Mohamed ;   et al.
2013-12-12
Integrated circuit devices and methods of forming memory array and peripheral circuitry isolation
Grant 8,575,716 - Mathew , et al. November 5, 2
2013-11-05
Forming air gaps in memory arrays and memory arrays with air gaps thus formed
Grant 8,569,130 - Mathew , et al. October 29, 2
2013-10-29
Integrated Circuit Devices And Methods Of Forming Memory Array And Peripheral Circuitry Isolation
App 20130249050 - Mathew; James ;   et al.
2013-09-26
Source/drain Zones With A Delectric Plug Over An Isolation Region Between Active Regions And Methods
App 20130168756 - Hopkins; John ;   et al.
2013-07-04
Integrated circuit devices and methods of forming memory array and peripheral circuitry isolation
Grant 8,461,016 - Mathew , et al. June 11, 2
2013-06-11
Integrated Circuit Devices And Methods Of Forming Memory Array And Peripheral Circuitry Isolation
App 20130087883 - Mathew; James ;   et al.
2013-04-11
Contact formation
Grant 8,377,819 - Mathew , et al. February 19, 2
2013-02-19
Contact Formation
App 20120009779 - Mathew; James ;   et al.
2012-01-12
Contact formation
Grant 8,034,706 - Mathew , et al. October 11, 2
2011-10-11
Contact Formation
App 20100233875 - Mathew; James ;   et al.
2010-09-16
Contact formation
Grant 7,737,022 - Mathew , et al. June 15, 2
2010-06-15
Contact Formation
App 20090176365 - Mathew; James ;   et al.
2009-07-09
Plasma Treatment Of Insulating Material
App 20080246124 - Mathew; James ;   et al.
2008-10-09
Contact formation
App 20070202677 - Mathew; James ;   et al.
2007-08-30
Hard mask damascene process used to form a semiconductor device
App 20030087514 - Tang, Sanh Dang ;   et al.
2003-05-08

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