loadpatents
Patent applications and USPTO patent grants for Master; Raj N..The latest application filed is for "graphic formation via material ablation".
Patent | Date |
---|---|
Graphic formation via material ablation Grant 9,661,770 - McCormack , et al. May 23, 2 | 2017-05-23 |
Graphic Formation via Material Ablation App 20160143170 - McCormack; Mark Thomas ;   et al. | 2016-05-19 |
Metal alloy injection molding Grant 9,205,486 - Bornemann , et al. December 8, 2 | 2015-12-08 |
Metal Alloy Injection Molding App 20150202682 - Bornemann; Paul C. ;   et al. | 2015-07-23 |
Metal alloy injection molding overflows Grant 9,027,631 - Bornemann , et al. May 12, 2 | 2015-05-12 |
Metal alloy injection molding protrusions Grant 8,991,473 - Bornemann , et al. March 31, 2 | 2015-03-31 |
Graphic Formation via Material Ablation App 20140248506 - McCormack; Mark Thomas ;   et al. | 2014-09-04 |
Metal Alloy Injection Molding Overflows App 20140166227 - Bornemann; Paul C. ;   et al. | 2014-06-19 |
Metal Alloy Injection Molding App 20140158317 - Bornemann; Paul C. ;   et al. | 2014-06-12 |
Metal Alloy Injection Techniques App 20140150982 - Bornemann; Paul C. ;   et al. | 2014-06-05 |
Metal Alloy Injection Molding Protrusions App 20140154523 - Bornemann; Paul C. ;   et al. | 2014-06-05 |
Metal alloy injection molding protrusions Grant 8,733,423 - Bornemann , et al. May 27, 2 | 2014-05-27 |
Metal Alloy Injection Molding Protrusions App 20140131000 - Bornemann; Paul C. ;   et al. | 2014-05-15 |
Integrated circuit socket Grant 8,297,986 - Too , et al. October 30, 2 | 2012-10-30 |
Void reduction in indium thermal interface material Grant 7,999,394 - Too , et al. August 16, 2 | 2011-08-16 |
Semiconductor chip with solder joint protection ring Grant 7,923,850 - Khan , et al. April 12, 2 | 2011-04-12 |
Void Reduction in Indium Thermal Interface Material App 20100117222 - Too; Seah Sun ;   et al. | 2010-05-13 |
Semiconductor Chip with Solder Joint Protection Ring App 20100052188 - Khan; Mohammad ;   et al. | 2010-03-04 |
Void reduction in indium thermal interface material Grant 7,651,938 - Too , et al. January 26, 2 | 2010-01-26 |
Method for forming solder joints for a flip chip assembly Grant 7,601,612 - Master , et al. October 13, 2 | 2009-10-13 |
Reduction of damage to thermal interface material due to asymmetrical load Grant 7,544,542 - Too , et al. June 9, 2 | 2009-06-09 |
Integrated Circuit Socket App 20080227310 - Too; Seah Sun ;   et al. | 2008-09-18 |
Reduction of Damage to Thermal Interface Material Due to Asymmetrical Load App 20080124841 - Too; Seah Sun ;   et al. | 2008-05-29 |
Void Reduction in Indium Thermal Interface Material App 20070284737 - Too; Seah Sun ;   et al. | 2007-12-13 |
Lead-free semiconductor package Grant 7,215,030 - Master , et al. May 8, 2 | 2007-05-08 |
Lead-free semiconductor package App 20060289977 - Master; Raj N. ;   et al. | 2006-12-28 |
Organic packages having low tin solder connections Grant 6,812,570 - Master , et al. November 2, 2 | 2004-11-02 |
Controlled and programmed deposition of flux on a flip-chip die by spraying Grant 6,722,553 - Master , et al. April 20, 2 | 2004-04-20 |
Method and apparatus for jet printing a flux pattern selectively on flip-chip bumps Grant 6,709,963 - Halderman , et al. March 23, 2 | 2004-03-23 |
Method of fabricating reliable laminate flip-chip assembly Grant 6,632,690 - Master , et al. October 14, 2 | 2003-10-14 |
Method of reflowing organic packages using no-clean flux Grant 6,617,195 - Master , et al. September 9, 2 | 2003-09-09 |
Method of fabricating reliable laminate flip-chip assembly App 20030077852 - Master, Raj N. ;   et al. | 2003-04-24 |
Universal ball attach manufacturing process App 20030052155 - Master, Raj N. ;   et al. | 2003-03-20 |
Boat for ball attach manufacturing process App 20030047527 - Master, Raj N. ;   et al. | 2003-03-13 |
Organic packages having low tin solder connections App 20030037959 - Master, Raj N. ;   et al. | 2003-02-27 |
Organic Packages With Solders For Reliable Flip Chip Connections App 20020170746 - MASTER, RAJ N ;   et al. | 2002-11-21 |
Method to reduce occurrences of fillet cracking in flip-chip underfill Grant 6,372,544 - Halderman , et al. April 16, 2 | 2002-04-16 |
Controlled and programmed deposition of flux on a flip-chip die by spraying App 20020031861 - Master, Raj N. ;   et al. | 2002-03-14 |
Hot vacuum device removal process and apparatus Grant 5,605,277 - Jackson , et al. February 25, 1 | 1997-02-25 |
Method and structure for repairing electrical lines Grant 5,153,408 - Handford , et al. October 6, 1 | 1992-10-06 |
Method of making multilayered ceramic structures having an internal distribution of copper-based conductors Grant 4,885,038 - Anderson, Jr. , et al. December 5, 1 | 1989-12-05 |
Method of controlling the sintering of metal particles Grant 4,776,978 - Herron , et al. October 11, 1 | 1988-10-11 |
Bonding of pure metal films to ceramics Grant 4,764,341 - Flaitz , et al. August 16, 1 | 1988-08-16 |
Method of controlling the sintering of metal particles Grant 4,671,928 - Herron , et al. June 9, 1 | 1987-06-09 |
Method for removal of carbonaceous residues from ceramic structures having internal metallurgy Grant 4,627,160 - Herron , et al. December 9, 1 | 1986-12-09 |
Material and process set for fabrication of molecular matrix print head Grant 4,504,340 - Tummala , et al. March 12, 1 | 1985-03-12 |
Process for flattening glass-ceramic substrates Grant 4,340,436 - Dubetsky , et al. July 20, 1 | 1982-07-20 |
Method of making multilayered glass-ceramic structures having an internal distribution of copper-based conductors Grant 4,234,367 - Herron , et al. November 18, 1 | 1980-11-18 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.