loadpatents
name:-0.018326997756958
name:-0.017357110977173
name:-0.0043480396270752
Marques; Augusto Patent Filings

Marques; Augusto

Patent Applications and Registrations

Patent applications and USPTO patent grants for Marques; Augusto.The latest application filed is for "avoiding very low duty cycles in a divided clock generated by a frequency divider".

Company Profile
2.19.17
  • Marques; Augusto - Bangalore IN
  • Marques; Augusto - Moscavide PT
  • Marques; Augusto - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Avoiding very low duty cycles in a divided clock generated by a frequency divider
Grant 10,700,669 - Baladhandapani , et al.
2020-06-30
Hitless switching when generating an output clock derived from multiple redundant input clocks
Grant 10,514,720 - J , et al. Dec
2019-12-24
Avoiding Very Low Duty Cycles In A Divided Clock Generated By A Frequency Divider
App 20190386644 - Baladhandapani; Nigesh ;   et al.
2019-12-19
Hitless Switching When Generating An Output Clock Derived From Multiple Redundant Input Clocks
App 20190384351 - J; Raja Prabhu ;   et al.
2019-12-19
Reducing errors due to non-linearities caused by a phase frequency detector of a phase locked loop
Grant 9,742,414 - J , et al. August 22, 2
2017-08-22
Programmable frequency divider providing a fifty-percent duty-cycle output over a range of divide factors
Grant 9,608,801 - Perdoor , et al. March 28, 2
2017-03-28
Programmable Frequency Divider Providing A Fifty-percent Duty-cycle Output Over A Range Of Divide Factors
App 20170005786 - Perdoor; Sandeep ;   et al.
2017-01-05
Phase Locked Loop With Low Phase-noise
App 20160336923 - SEEDHER; ANKIT ;   et al.
2016-11-17
Reducing Errors Due To Non-linearities Caused By A Phase Frequency Detector Of A Phase Locked Loop
App 20160329902 - J.; RAJA PRABHU ;   et al.
2016-11-10
Programmable frequency divider providing output with reduced duty-cycle variations over a range of divide ratios
Grant 9,438,257 - Perdoor , et al. September 6, 2
2016-09-06
Sliced transmitter front-end
Grant 9,065,691 - Chang , et al. June 23, 2
2015-06-23
Tunable inductor
Grant 8,963,674 - Lee , et al. February 24, 2
2015-02-24
Integrated circuit device, electronic device and method therefor
Grant 8,669,816 - Chen , et al. March 11, 2
2014-03-11
Clock generating apparatus and frequency calibrating method of the clock generating apparatus
Grant 8,570,107 - Guo , et al. October 29, 2
2013-10-29
Digitally controlled oscillator
Grant 8,519,801 - Chen , et al. August 27, 2
2013-08-27
Temperature compensation circuit and synthesizer using the temperature compensation circuit
Grant 8,493,114 - Cho , et al. July 23, 2
2013-07-23
Sliced Transmitter Front-end
App 20130142274 - Chang; Hsiang-Hui ;   et al.
2013-06-06
Digitally Controlled Oscillator
App 20130043958 - Chen; Yen-Horng ;   et al.
2013-02-21
Temperature Compensation Circuit And Synthesizer Using The Temperature Compensation Circuit
App 20130009680 - Cho; Lan-Chou ;   et al.
2013-01-10
Clock Generating Apparatus And Frequency Calibrating Method Of The Clock Generating Apparatus
App 20120249195 - Guo; Xiaochuan ;   et al.
2012-10-04
Tunable Inductor
App 20120154073 - Lee; Wen-Chang ;   et al.
2012-06-21
Integrated Circuit Device, Electronic Device And Method Therefor
App 20120074993 - Chen; Yen-Horng ;   et al.
2012-03-29
Integrated Circuit Device, Electronic Device And Method For Compensating Frequency Drift Of A Controllable Oscillator
App 20120074998 - Brett; Stephen Jonathan ;   et al.
2012-03-29
Semiconductor Device With Oxide Define Pattern
App 20110133308 - Chan; Kuei-Ti ;   et al.
2011-06-09
Reference-less clock circuit
Grant 7,671,688 - Marques March 2, 2
2010-03-02
Reference-less Clock Circuit
App 20080136538 - Marques; Augusto
2008-06-12
Reference-less clock circuit
Grant 7,332,975 - Marques February 19, 2
2008-02-19
Reference-less Clock Circuit
App 20070205832 - Marques; Augusto
2007-09-06

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