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Method Of Securing Devices Used In The Internet Of Things
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Integrated Circuit To Secure Devices In The Internet Of Things
App 20220058294 - Iuzifovich; Iurii V ; et al. | 2022-02-24 |
Method of securing devices used in the internet of things
Grant 11,194,935 - Iuzifovich , et al. December 7, 2 | 2021-12-07 |
Method and apparatus for supporting speculative memory optimizations
Grant 10,853,078 - Mekkat , et al. December 1, 2 | 2020-12-01 |
Processors, methods, systems, and instruction conversion modules for instructions with compact instruction encodings due to use of context of a prior instruction
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Method And Apparatus For Supporting Speculative Memory Optimizations
App 20200201645 - MEKKAT; Vineeth ; et al. | 2020-06-25 |
Eliminating redundant stores using a protection designator and a clear designator
Grant 10,540,178 - Mekkat , et al. Ja | 2020-01-21 |
Method Of Securing Devices Used In The Internet Of Things
App 20190278950 - Iuzifovich; Iurii V. ; et al. | 2019-09-12 |
Eliminating redundant store instructions from execution while maintaining total store order
Grant 10,120,686 - Mekkat , et al. November 6, 2 | 2018-11-06 |
Method and apparatus for recovering from bad store-to-load forwarding in an out-of-order processor
Grant 9,996,356 - Mekkat , et al. June 12, 2 | 2018-06-12 |
Processors, Methods, Systems, And Instruction Conversion Modules For Instructions With Compact Instruction Encodings
App 20180081684 - Chou; Ching-Tsun ; et al. | 2018-03-22 |
Instruction and Logic for Dynamic Store Elimination
App 20180074827 - Mekkat; Vineeth ; et al. | 2018-03-15 |
Instruction and Logic for Total Store Elimination
App 20170351516 - Mekkat; Vineeth ; et al. | 2017-12-07 |
2-D gather instruction and a 2-D cache
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Method and apparatus for memory aliasing detection in an out-of-order instruction execution platform
Grant 9,710,389 - Margulis , et al. July 18, 2 | 2017-07-18 |
Binary Translation Support Using Processor Instruction Prefixes
App 20170192788 - Margulis; Oleg ; et al. | 2017-07-06 |
Method and apparatus for recovering from bad store-to-load forwarding in an out-of-order processor
App 20170185404 - Mekkat; Vineeth ; et al. | 2017-06-29 |
Method And Apparatus For Memory Aliasing Detection In An Out-of-order Instruction Execution Platform
App 20160267009 - Margulis; Oleg ; et al. | 2016-09-15 |
2-D Gather Instruction and a 2-D Cache
App 20150178217 - Ginzburg; Boris ; et al. | 2015-06-25 |
2-D gather instruction and a 2-D cache
Grant 9,001,138 - Ginzburg , et al. April 7, 2 | 2015-04-07 |
Metaphysical address space for holding lossy metadata in hardware
Grant 8,806,101 - Sheaffer , et al. August 12, 2 | 2014-08-12 |
Extending cache coherency protocols to support locally buffered data
Grant 8,799,582 - Sheaffer , et al. August 5, 2 | 2014-08-05 |
Memory model for hardware attributes within a transactional memory system
Grant 8,769,212 - Sheaffer , et al. July 1, 2 | 2014-07-01 |
Read and write monitoring attributes in transactional memory (TM) systems
Grant 8,688,917 - Sheaffer , et al. April 1, 2 | 2014-04-01 |
Memory model for hardware attributes within a transactional memory system
Grant 8,627,014 - Sheaffer , et al. January 7, 2 | 2014-01-07 |
Read and write monitoring attributes in transactional memory (TM) systems
Grant 8,627,017 - Sheaffer , et al. January 7, 2 | 2014-01-07 |
A 2-d Gather Instruction And A 2-d Cache
App 20130054899 - Ginzburg; Boris ; et al. | 2013-02-28 |
Method and system to reduce the power consumption of a memory device
Grant 8,352,683 - Cohen , et al. January 8, 2 | 2013-01-08 |
System and method to reduce power consumption by partially disabling cache memory
Grant 8,271,732 - Cohen , et al. September 18, 2 | 2012-09-18 |
Memory Model For Hardware Attributes Within A Transactional Memory System
App 20120159079 - Sheaffer; Gad ; et al. | 2012-06-21 |
Read And Write Monitoring Attributes In Transactional Memory (tm) Systems
App 20120117334 - Sheaffer; Gad ; et al. | 2012-05-10 |
Method And System To Reduce The Power Consumption Of A Memory Device
App 20110320723 - Cohen; Ehud ; et al. | 2011-12-29 |
Extending Cache Coherency Protocols To Support Locally Buffered Data
App 20100169581 - Sheaffer; Gad ; et al. | 2010-07-01 |
Read And Write Monitoring Attributes In Transactional Memory (tm) Systems
App 20100169579 - Sheaffer; Gad ; et al. | 2010-07-01 |
Memory Model For Hardware Attributes Within A Transactional Memory System
App 20100169580 - Sheaffer; Gad ; et al. | 2010-07-01 |
Metaphysical Address Space For Holding Lossy Metadata In Hardware
App 20100169382 - Sheaffer; Gad ; et al. | 2010-07-01 |
Accessing a cache memory with reduced power consumption
App 20100146212 - Cohen; Ehud ; et al. | 2010-06-10 |
Apparatus And Method For Memory Structure To Handle Two Load Operations
App 20090300319 - Cohen; Ehud ; et al. | 2009-12-03 |
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