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Patent applications and USPTO patent grants for Marenin; George B..The latest application filed is for "bandwidth efficient method and means for resynchronizing a master and slave over a clocked, arbitrated, bidirectional multistate parallel bus using local data recirculation, wait states, and cycle stealing".
Patent | Date |
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Bandwidth efficient method and means for resynchronizing a master and slave over a clocked, arbitrated, bidirectional multistate parallel bus using local data recirculation, wait states, and cycle stealing Grant 5,859,986 - Marenin January 12, 1 | 1999-01-12 |
Method and apparatus for assuring that multiple messages in a multi-node network are assured fair access to an outgoing data stream Grant 5,613,067 - Brady , et al. March 18, 1 | 1997-03-18 |
Dynamic bus arbitration with concurrent same bus granting every cycle Grant 5,195,185 - Marenin March 16, 1 | 1993-03-16 |
Undirectional looped bus microcomputer architecture Grant 4,378,589 - Finnegan , et al. March 29, 1 | 1983-03-29 |
Function integrated, shared ALU processor apparatus and method Grant 4,339,793 - Marenin July 13, 1 | 1982-07-13 |
Microprocessor architecture with integrated interrupts and cycle steals prioritized channel Grant 4,181,934 - Marenin January 1, 1 | 1980-01-01 |
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