Mao; Daxin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mao; Daxin.The latest application filed is for "three-dimensional memory device containing hydrogen diffusion barrier structures for cmos under array architecture and method of".

Company Profile

6.21.25

Mao; Daxin - Cupertino CA
Mao; Daxin - San Jose CA
Mao; Daxin - Milpitas CA
MAO; DAXIN - Chiba JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Three-dimensional memory device containing hydrogen diffusion barrier structures for CMOS under array architecture and method of making the same Grant 10,354,956 - Yu , et al. July 16, 2	2019-07-16
Three-dimensional Memory Device Containing Hydrogen Diffusion Barrier Structures For Cmos Under Array Architecture And Method Of App 20190214344 - Yu; Jixin ; et al.	2019-07-11
Multi-tier memory device with through-stack peripheral contact via structures and method of making thereof Grant 10,269,620 - Yu , et al.	2019-04-23
Through-memory-level via structures between staircase regions in a three-dimensional memory device and method of making thereof Grant 10,256,248 - Lu , et al.	2019-04-09
Within-array through-memory-level via structures and method of making thereof Grant 10,249,640 - Yu , et al.	2019-04-02
Three-dimensional memory device having L-shaped word lines and a support structure and methods of making the same Grant 10,217,746 - Kim , et al. Feb	2019-02-26
Three dimensional memory device containing discrete silicon nitride charge storage regions Grant 10,115,732 - Yu , et al. October 30, 2	2018-10-30
Three-dimensional memory devices containing inter-tier dummy memory cells and methods of making the same Grant 10,056,399 - Costa , et al. August 21, 2	2018-08-21
Three-dimensional Memory Devices Containing Inter-tier Dummy Memory Cells And Methods Of Making The Same App 20180182771 - Costa; Xiying ; et al.	2018-06-28
Bulb-shaped memory stack structures for direct source contact in three-dimensional memory device Grant 10,008,570 - Yu , et al. June 26, 2	2018-06-26
Method of forming a staircase in a semiconductor device using a linear alignment control feature Grant 9,985,046 - Lu , et al. May 29, 2	2018-05-29
Bulb-shaped Memory Stack Structures For Direct Source Contact In Three-dimensional Memory Device App 20180122906 - YU; Jixin ; et al.	2018-05-03
Self-aligned isolation dielectric structures for a three-dimensional memory device Grant 9,859,363 - Lu , et al. January 2, 2	2018-01-02
Method of making a multilevel memory stack structure using a cavity containing a sacrificial fill material Grant 9,853,043 - Lu , et al. December 26, 2	2017-12-26
Method Of Forming A Staircase In A Semiconductor Device Using A Linear Alignmnent Control Feature App 20170358594 - LU; Zhenyu ; et al.	2017-12-14
Within-array Through-memory-level Via Structures And Method Of Making Thereof App 20170358593 - YU; Jixin ; et al.	2017-12-14
Through-memory-level Via Structures Between Staircase Regions In A Three-dimensional Memory Device And Method Of Making Thereof App 20170352678 - LU; Zhenyu ; et al.	2017-12-07
Three Dimensional Memory Device Containing Discrete Silicon Nitride Charge Storage Regions App 20170243879 - YU; Jixin ; et al.	2017-08-24
Multi-tier Memory Device With Through-stack Peripheral Contact Via Structures And Method Of Making Thereof App 20170236746 - YU; Jixin ; et al.	2017-08-17
Self-aligned Isolation Dielectric Structures For A Three-dimensional Memory Device App 20170236896 - LU; Zhenyu ; et al.	2017-08-17
Multi-tier Replacement Memory Stack Structure Integration Scheme App 20170229472 - LU; Ching-Huang ; et al.	2017-08-10
Multi-tier replacement memory stack structure integration scheme Grant 9,728,551 - Lu , et al. August 8, 2	2017-08-08
Forming 3D memory cells after word line replacement Grant 9,716,101 - Lu , et al. July 25, 2	2017-07-25
Three-dimensional memory devices containing memory block bridges Grant 9,679,906 - Lu , et al. June 13, 2	2017-06-13
Three dimensional memory device with peripheral devices under dummy dielectric layer stack and method of making thereof Grant 9,673,213 - Yu , et al. June 6, 2	2017-06-06
Method Of Making A Multilevel Memory Stack Structure Using A Cavity Containing A Sacrificial Fill Material App 20170062454 - LU; Zhenyu ; et al.	2017-03-02
Three-dimensional Memory Devices Containing Memory Block Bridges App 20170047334 - Lu; Zhenyu ; et al.	2017-02-16
Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors Grant 9,543,318 - Lu , et al. January 10, 2	2017-01-10
Memory Hole Last Boxim App 20160343718 - Lu; Zhenyu ; et al.	2016-11-24
Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors Grant 9,449,987 - Miyata , et al. September 20, 2	2016-09-20
Closed-loop control for effective pad conditioning Grant 8,337,279 - Dhandapani , et al. December 25, 2	2012-12-25
Method and composition for electrochemically polishing a conductive material on a substrate Grant 7,879,255 - Tran , et al. February 1, 2	2011-02-01
Closed-loop Control For Effective Pad Conditioning App 20090318060 - Dhandapani; Sivakumar ; et al.	2009-12-24
Process and composition for conductive material removal by electrochemical mechanical polishing Grant 7,582,564 - Wang , et al. September 1, 2	2009-09-01
Detection Of Clearance Of Polysilicon Residue App 20080138988 - David; Jeffrey Drue ; et al.	2008-06-12
Abrasive Composition For Electrochemical Mechanical Polishing App 20070254485 - Mao; Daxin ; et al.	2007-11-01
Method And Composition For Electrochemically Polishing A Conductive Material On A Substrate App 20070102303 - TRAN; HUYEN KAREN ; et al.	2007-05-10
Method and apparatus for reduced wear polishing pad conditioning Grant 7,210,988 - Wang , et al. May 1, 2	2007-05-01
Multiple Chemistry Electrochemical Plating Method App 20060266655 - SUN; ZHI-WEN ; et al.	2006-11-30
Process and composition for electrochemical mechanical polishing App 20060249394 - Jia; Renhe ; et al.	2006-11-09
Tungsten electroprocessing App 20060196778 - Jia; Renhe ; et al.	2006-09-07
Method and composition for polishing a substrate App 20060169674 - Mao; Daxin ; et al.	2006-08-03
Method and apparatus for reduced wear polishing pad conditioning App 20060046623 - Wang; Yan ; et al.	2006-03-02
Process and composition for conductive material removal by electrochemical mechanical polishing App 20050218010 - Wang, Zhihong ; et al.	2005-10-06
Endpoint for electrochemical processing App 20050077188 - Mao, Daxin ; et al.	2005-04-14
Multiple chemistry electrochemical plating method App 20040154926 - Sun, Zhi-Wen ; et al.	2004-08-12

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