Manning; Monte

Patent Applications and Registrations

Patent applications and USPTO patent grants for Manning; Monte.The latest application filed is for "thin film transistors and methods of forming thin film transistors".

Company Profile

0.66.17

Manning; Monte - Kuna ID
Manning, Monte - Boise ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Integrated circuitry and a semiconductor processing method of forming a series of conductive lines Grant 7,208,836 - Manning April 24, 2	2007-04-24
Integrated circuitry and a semiconductor processing method of forming a series of conductive lines Grant 7,148,134 - Manning December 12, 2	2006-12-12
Thin film transistors and methods of forming thin film transistors App 20050156243 - Manning, Monte	2005-07-21
Electrical interconnection and thin film transistor fabrication methods, and integrated circuitry App 20050145850 - Dennison, Charles H. ; et al.	2005-07-07
Integrated circuitry and a semiconductor processing method of forming a series of conductive lines App 20050035456 - Manning, Monte	2005-02-17
Thin film transistor Grant 6,844,577 - Manning January 18, 2	2005-01-18
Integrated circuitry and a semiconductor processing method of forming a series of conductive lines App 20050009326 - Manning, Monte	2005-01-13
Electrical interconnection and thin film transistor fabrication methods, and integrated circuitry App 20040235226 - Dennison, Charles H. ; et al.	2004-11-25
Method of making a resistor, method of making a diode, and SRAM circuitry and other integrated circuitry Grant 6,767,785 - Rolfson , et al. July 27, 2	2004-07-27
Methods of forming transistors Grant 6,759,285 - Dennison , et al. July 6, 2	2004-07-06
Methods of forming transistors Grant 6,689,649 - Dennison , et al. February 10, 2	2004-02-10
Integrated circuitry conductive lines Grant 6,611,059 - Manning August 26, 2	2003-08-26
Method of making a resistor, method of making a diode, and SRAM circuitry and other integrated circuitry App 20020132419 - Rolfson, J. Brett ; et al.	2002-09-19
Electrical interconnection and thin film transistor fabrication mehods, and integrated circuitry App 20020076865 - Dennison, Charles H. ; et al.	2002-06-20
Thin film transistors and methods of forming thin film transistors App 20020048875 - Manning, Monte	2002-04-25
Method of making field effect Grant 6,376,287 - Dennison , et al. April 23, 2	2002-04-23
Apparatus Improving Latchup Immunity In A Dual-polysilicon Gate App 20020003266 - MANNING, MONTE	2002-01-10
Integrated Circuitry App 20020003282 - ROLFSON, J. BRETT ; et al.	2002-01-10
Method of making a resistor, method of making a diode, and SRAM circuitry and other integrated circuitry App 20020003283 - Rolfson, J Brett ; et al.	2002-01-10
Methods Of Forming Thin Film Transistors App 20020001884 - MANNING, MONTE	2002-01-03
Methods Of Forming Resistors App 20010046734 - ROLFSON, J. BRETT ; et al.	2001-11-29
Static memory cell Grant 6,319,800 - Manning November 20, 2	2001-11-20
Methods of forming transistors App 20010034091 - Dennison, Charles H. ; et al.	2001-10-25
Methods of forming integrated circuitry App 20010031520 - Dennison, Charles H. ; et al.	2001-10-18
Semiconductor method of making electrical connection between an electrically conductive line and a node location, and integrated circuitry App 20010010968 - Manning, Monte	2001-08-02
Thin film transistors and method of forming thin film transistors App 20010000756 - Batra, Shubneesh ; et al.	2001-05-03
Thin film transistors and method of forming thin film transistors Grant 6,214,652 - Batra , et al. April 10, 2	2001-04-10
Methods of forming conductive polysilicon lines and bottom gated thin film transistors, and conductive polysilicon lines and thin film transistors Grant 6,200,835 - Manning March 13, 2	2001-03-13
Integrated circuitry and method of forming a field effect transistor Grant 6,177,346 - Manning January 23, 2	2001-01-23
Thin film transistors Grant 6,175,134 - Manning January 16, 2	2001-01-16
Methods of forming conductive lines Grant 6,096,636 - Manning August 1, 2	2000-08-01
Semiconductor processing methods of forming a buried contact, a conductive line, an electrical connection to a buried contact area, and a field effect transistor gate Grant 6,040,221 - Manning March 21, 2	2000-03-21
Thin film transistor and method of forming thin film transistors Grant 6,017,782 - Batra , et al. January 25, 2	2000-01-25
MOS diode for use in a non-volatile memory cell background Grant 5,978,258 - Manning November 2, 1	1999-11-02
Method of forming CMOS having simultaneous formation of halo regions of PMOS and part of source/drain of NMOS Grant 5,930,615 - Manning July 27, 1	1999-07-27
Method of forming thin film transistors Grant 5,904,513 - Batra , et al. May 18, 1	1999-05-18
Field effect transistor with barrier layer Grant 5,869,874 - Manning February 9, 1	1999-02-09
Method of making thin film transistors Grant 5,858,821 - Dennison , et al. January 12, 1	1999-01-12
Planar thin film transistor structures Grant 5,844,254 - Manning , et al. December 1, 1	1998-12-01
Method of forming BiCMOS circuitry Grant 5,843,814 - Manning December 1, 1	1998-12-01
Static memory cell Grant 5,818,750 - Manning October 6, 1	1998-10-06
MOS diode for use in a non-volatile memory cell Grant 5,812,441 - Manning September 22, 1	1998-09-22
Semiconductor processing method for providing large grain polysilicon films Grant 5,792,700 - Turner , et al. August 11, 1	1998-08-11
Semiconductor processing method of forming a buried contact Grant 5,773,346 - Manning June 30, 1	1998-06-30
Low cost well process Grant 5,759,881 - Manning June 2, 1	1998-06-02
SRAM cell employing substantially vertically elongated pull-up resistors and methods of making, and resistor constructions and methods of making Grant 5,744,846 - Batra , et al. April 28, 1	1998-04-28
Semiconductor processing method of forming complementary NMOS and PMOS field effect transistors on a substrate Grant 5,736,440 - Manning April 7, 1	1998-04-07
Integrated circuitry having a thin film polysilicon layer in ohmic contact with a conductive layer Grant 5,729,055 - Manning March 17, 1	1998-03-17
Semiconductor processing methods of forming field oxide regions on a semiconductor substrate Grant 5,700,733 - Manning December 23, 1	1997-12-23
Integrated circuitry having a pair of adjacent conductive lines Grant 5,691,565 - Manning November 25, 1	1997-11-25
Planar thin film transistor structures Grant 5,691,547 - Manning , et al. November 25, 1	1997-11-25
SRAM cell employing substantially vertically elongated pull-up resistors and methods of making, and resistor constructions and methods of making Grant 5,683,930 - Batra , et al. November 4, 1	1997-11-04
Semiconductor processing method of forming a buried contact and conductive line Grant 5,681,778 - Manning October 28, 1	1997-10-28
Thin film transistors Grant 5,670,794 - Manning September 23, 1	1997-09-23
Thin film transistor redundancy structure Grant 5,663,679 - Manning September 2, 1	1997-09-02
Method for forming and tailoring the electrical characteristics of semiconductor devices Grant 5,661,045 - Manning , et al. August 26, 1	1997-08-26
Methods of forming conductive polysilicon lines and bottom gated thin film transistors Grant 5,658,807 - Manning August 19, 1	1997-08-19
Redundancy elements using thin film transistors (TFTs) Grant 5,644,540 - Manning July 1, 1	1997-07-01
Fully planarized thin film transistor (TFT) and process to fabricate same Grant 5,616,934 - Dennison , et al. April 1, 1	1997-04-01
Conductive polysilicon lines and thin film transistors Grant 5,600,153 - Manning February 4, 1	1997-02-04
Thin film transistor redundancy structure Grant 5,552,743 - Manning September 3, 1	1996-09-03
Thin film transistor with large grain size DRW offset region and small grain size source and drain and channel regions Grant 5,548,132 - Batra , et al. August 20, 1	1996-08-20
Method of forming improved contacts from polysilicon to silicon or other polysilicon layers Grant 5,541,137 - Manning , et al. July 30, 1	1996-07-30
Semiconductor processing method for providing large grain polysilicon films Grant 5,491,107 - Turner , et al. February 13, 1	1996-02-13
Sixteen megabit static random access memory (SRAM) cell Grant 5,422,499 - Manning June 6, 1	1995-06-06
Method for improving latchup immunity in a dual-polysilicon gate process Grant 5,420,061 - Manning May 30, 1	1995-05-30
Method of forming a planar thin film transistor Grant 5,411,909 - Manning , et al. May 2, 1	1995-05-02
Redundancy elements using thin film transistors (TFTs) Grant 5,392,245 - Manning February 21, 1	1995-02-21
Method of forming a self-aligned low density drain inverted thin film transistor Grant 5,385,854 - Batra , et al. January 31, 1	1995-01-31
Method of fabricating a bottom and top gated thin film transistor Grant 5,348,899 - Dennison , et al. September 20, 1	1994-09-20
Process for forming low resistance contacts between silicide areas and upper level polysilicon interconnects Grant 5,346,836 - Manning , et al. September 13, 1	1994-09-13
Self-aligned low resistance buried contact process Grant 5,292,676 - Manning March 8, 1	1994-03-08
Methods for producing thin film transistor having a diode shunt Grant 5,286,663 - Manning February 15, 1	1994-02-15
Trench isolation using gated sidewalls Grant 5,275,965 - Manning January 4, 1	1994-01-04
Self-aligned vertical intrinsic resistance Grant 5,241,206 - Lee , et al. August 31, 1	1993-08-31
Method of fabricating vertically integrated oxygen-implanted polysilicon resistor Grant 5,232,865 - Manning , et al. August 3, 1	1993-08-03
Thin film field effect transistor, CMOS inverter, and methods of forming thin film field effect transistors and CMOS inverters Grant 5,214,295 - Manning May 25, 1	1993-05-25
Low cost polysilicon active p-channel load Grant 5,212,399 - Manning May 18, 1	1993-05-18
Trench isolation method having a double polysilicon gate formed on mesas Grant 5,177,028 - Manning January 5, 1	1993-01-05
Method of making self-aligned vertical intrinsic resistance Grant 5,177,030 - Lee , et al. January 5, 1	1993-01-05
Integrated circuit device with gate in sidewall Grant 5,173,754 - Manning December 22, 1	1992-12-22
Vertically integrated oxygen-implanted polysilicon resistor Grant 5,159,430 - Manning , et al. October 27, 1	1992-10-27
Method for forming a multilevel interconnect structure on a semiconductor wafer Grant 5,055,426 - Manning October 8, 1	1991-10-08

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.