Manley; Martin H.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Manley; Martin H..The latest application filed is for "integrated transistor and anti-fuse as programming element for a high-voltage integrated circuit".

Company Profile

0.22.11

Manley; Martin H. - Saratoga CA
Manley; Martin H. - San Jose CA
Manley; Martin H. - London GB2

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Gate pullback at ends of high-voltage vertical transistor structure Grant 9,601,613 - Parthasarathy , et al. March 21, 2	2017-03-21
Integrated transistor and anti-fuse as programming element for a high-voltage integrated circuit Grant 9,112,017 - Banerjee , et al. August 18, 2	2015-08-18
Checkerboarded high-voltage vertical transistor layout Grant 8,816,433 - Parthasarathy , et al. August 26, 2	2014-08-26
Sensing FET integrated with a high-voltage transistor Grant 8,653,583 - Parthasarathy , et al. February 18, 2	2014-02-18
Integrated Transistor and Anti-Fuse as Programming Element for a High-Voltage Integrated Circuit App 20130328114 - Banerjee; Sujit ; et al.	2013-12-12
Checkerboarded High-Voltage Vertical Transistor Layout App 20130234243 - Parthasarathy; Vijay ; et al.	2013-09-12
Integrated transistor and anti-fuse programming element for a high-voltage integrated circuit Grant 8,513,719 - Banerjee , et al. August 20, 2	2013-08-20
Checkerboarded high-voltage vertical transistor layout Grant 8,410,551 - Parthasarathy , et al. April 2, 2	2013-04-02
Gate Pullback at Ends of High-Voltage Vertical Transistor Structure App 20120280314 - Parthasarathy; Vijay ; et al.	2012-11-08
Integrated Transistor and Anti-Fuse Programming Element for a High-Voltage Integrated Circuit App 20120199885 - Banerjee; Sujit ; et al.	2012-08-09
Gate pullback at ends of high-voltage vertical transistor structure Grant 8,222,691 - Parthasarathy , et al. July 17, 2	2012-07-17
Integrated transistor and anti-fuse as programming element for a high-voltage integrated circuit Grant 8,164,125 - Banerjee , et al. April 24, 2	2012-04-24
Checkerboarded high-voltage vertical transistor layout App 20120061755 - Parthasarathy; Vijay ; et al.	2012-03-15
Integrated transistor and anti-fuse as programming element for a high-voltage integrated circuit App 20110272758 - Banerjee; Sujit ; et al.	2011-11-10
Checkerboarded high-voltage vertical transistor layout Grant 8,022,456 - Parthasarathy , et al. September 20, 2	2011-09-20
Checkerboarded high-voltage vertical transistor layout App 20110089476 - Parthasarathy; Vijay ; et al.	2011-04-21
Checkerboarded high-voltage vertical transistor layout Grant 7,859,037 - Parthasarathy , et al. December 28, 2	2010-12-28
High-voltage vertical transistor structure App 20090315105 - Parthasarathy; Vijay ; et al.	2009-12-24
Gate pullback at ends of high-voltage vertical transistor structure Grant 7,595,523 - Parthasarathy , et al. September 29, 2	2009-09-29
Sensing FET integrated with a high-voltage vertical transistor App 20080197406 - Parthasarathy; Vijay ; et al.	2008-08-21
Gate pullback at ends of high-voltage vertical transistor structure App 20080197418 - Parthasarathy; Vijay ; et al.	2008-08-21
Checkerboarded high-voltage vertical transistor layout App 20080197397 - Parthasarathy; Vijay ; et al.	2008-08-21
Low power programmable fuse structures and methods for making the same Grant 5,882,998 - Sur, Jr. , et al. March 16, 1	1999-03-16
EEPROM cell with the drain diffusion region self-aligned to the tunnel oxide region Grant 5,404,037 - Manley April 4, 1	1995-04-04
Buried bit-line source-side injection flash memory cell Grant 5,284,784 - Manley February 8, 1	1994-02-08
Split-gate EPROM cell using polysilicon spacers Grant 5,115,288 - Manley May 19, 1	1992-05-19
Method of making a non-volatile memory cell utilizing polycrystalline silicon spacer tunnel region Grant 5,108,939 - Manley , et al. April 28, 1	1992-04-28
Manufacture of a split-gate EPROM cell using polysilicon spacers Grant 5,063,172 - Manley November 5, 1	1991-11-05
Carrier-domain magnetometers with compensation responsive to variations in operating conditions Grant 4,339,715 - Bloodworth , et al. July 13, 1	1982-07-13

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