Malladi; Ramana Murty
Patent Applications and Registrations
Patent applications and USPTO patent grants for Malladi; Ramana Murty.The latest application filed is for "integrated circuit incorporating a low power data retiming circuit".
- Malladi; Ramana Murty - Williston VT
- Malladi; Ramana Murty - Essex Junction VT
| Patent | Date |
|---|---|
| Integrated circuit incorporating a low power data retiming circuit Grant 9,571,263 - Nallani , et al. February 14, 2 | 2017-02-14 |
| Integrated Circuit Incorporating A Low Power Data Retiming Circuit App 20160359611 - Nallani; Chakravartula ; et al. | 2016-12-08 |
| Scaling of bipolar transistors Grant 8,872,236 - Joseph , et al. October 28, 2 | 2014-10-28 |
| Radio frequency integrated circuit with on-chip noise source for self-test Grant 8,421,478 - Floyd , et al. April 16, 2 | 2013-04-16 |
| Tunable semiconductor device Grant 8,415,763 - Harame , et al. April 9, 2 | 2013-04-09 |
| Tunable Semiconductor Device App 20120248573 - Harame; David Louis ; et al. | 2012-10-04 |
| Scaling Of Bipolar Transistors App 20110278570 - Joseph; Alvin Jose ; et al. | 2011-11-17 |
| Scaling of bipolar transistors Grant 8,020,128 - Joseph , et al. September 13, 2 | 2011-09-13 |
| Scaling Of Bipolar Transistors App 20100327280 - Joseph; Alvin Jose ; et al. | 2010-12-30 |
| Radio Frequency Integrated Circuit with On-Chip Noise Source for Self-Test App 20090190640 - Floyd; Brian Allan ; et al. | 2009-07-30 |
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