loadpatents
name:-0.018732070922852
name:-0.014120101928711
name:-0.0014970302581787
Malinowski; John C. Patent Filings

Malinowski; John C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Malinowski; John C..The latest application filed is for "self-healing crack stop structure".

Company Profile
0.16.13
  • Malinowski; John C. - Jericho VT
  • Malinowski; John C. - Wappingers Falls NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor structure with thin film resistor and terminal bond pad
Grant 9,287,345 - Chen , et al. March 15, 2
2016-03-15
Self-healing crack stop structure
Grant 9,230,921 - Ayotte , et al. January 5, 2
2016-01-05
Self-healing Crack Stop Structure
App 20150097271 - Ayotte; Stephen P. ;   et al.
2015-04-09
Discontinuous guard ring
Grant 8,729,664 - Gambino , et al. May 20, 2
2014-05-20
Method For Forming Thin Film Resistor And Terminal Bond Pad Simultaneously
App 20140001599 - CHEN; Fen ;   et al.
2014-01-02
Method for forming thin film resistor and terminal bond pad simultaneously
Grant 8,563,336 - Chen , et al. October 22, 2
2013-10-22
Methods for reading a feature pattern from a packaged die
Grant 8,565,510 - Cohn , et al. October 22, 2
2013-10-22
Discontinuous Guard Ring
App 20130256826 - Gambino; Jeffrey P. ;   et al.
2013-10-03
Product chips and die with a feature pattern that contains information relating to the product chip
Grant 8,299,609 - Cohn , et al. October 30, 2
2012-10-30
Fabricating product chips and die with a feature pattern that contains information relating to the product chip
Grant 8,187,897 - Cohn , et al. May 29, 2
2012-05-29
Product Chips And Die With A Feature Pattern That Contains Information Relating To The Product Chip
App 20120119333 - Cohn; John M. ;   et al.
2012-05-17
Methods For Reading A Feature Pattern From A Packaged Die
App 20120120758 - Cohn; John M. ;   et al.
2012-05-17
Method for Forming Thin Film Resistor and Terminal Bond Pad Simultaneously
App 20100155893 - CHEN; Fen ;   et al.
2010-06-24
Product Chips and Die With a Feature Pattern That Contains Information Relating to the Product Chip, Methods for Fabricating Such Product Chips and Die, and Methods for Reading a Feature Pattern From a Packaged Die
App 20100044858 - Cohn; John M. ;   et al.
2010-02-25
Dual chip stack method for electro-static discharge protection of integrated circuits
Grant 7,067,914 - Malinowski , et al. June 27, 2
2006-06-27
Multi-level RF passive device
Grant 7,053,460 - Volant , et al. May 30, 2
2006-05-30
Method of polishing C4 molybdenum masks to remove molybdenum peaks
Grant 7,025,891 - Codding , et al. April 11, 2
2006-04-11
Method Of Polishing C4 Molybdenum Masks To Remove Molybdenum Peaks
App 20050045591 - Codding, Steven R. ;   et al.
2005-03-03
Selective nitride: oxide anisotropic etch process
Grant 6,656,375 - Armacost , et al. December 2, 2
2003-12-02
Process for implanting a deep subcollector with self-aligned photo registration marks
Grant 6,656,815 - Coolbaugh , et al. December 2, 2
2003-12-02
Multi-level RF passive device
App 20030116850 - Volant, Richard P. ;   et al.
2003-06-26
Dual chip stack method for electro-static discharge protection of integrated circuits
App 20030089979 - Malinowski, John C. ;   et al.
2003-05-15
Multiple material stacks with a stress relief layer between a metal structure and a passivation layer
App 20020163062 - Wang, Ping-Chuan ;   et al.
2002-11-07
Process for implanting a deep subcollector with self-aligned photo registration marks
App 20020146889 - Coolbaugh, Douglas D. ;   et al.
2002-10-10
Process for fabricating multiple pillars inside a dram trench for increased capacitor surface
Grant 5,204,280 - Dhong , et al. April 20, 1
1993-04-20

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