| Patent | Date |
|---|
High operation frequency, area efficient and cost effective content addressable memory architecture
Grant 10,572,440 - Kumar , et al. Feb | 2020-02-25 |
Parallel pipeline logic circuit for generating CRC values utilizing lookup table
Grant 10,404,278 - Kumar , et al. Sep | 2019-09-03 |
High Operation Frequency, Area Efficient & Cost Effective Content Addressable Memory Architecture
App 20190197014 - KUMAR; Tejinder ; et al. | 2019-06-27 |
Generic width independent parallel checker for a device under test
Grant 10,222,415 - Kumar , et al. | 2019-03-05 |
Generic bit error rate analyzer for use with serial data links
Grant 10,198,331 - Kumar , et al. Fe | 2019-02-05 |
Current steering digital to analog converter with decoder free quad switching
Grant 10,148,277 - Singh , et al. De | 2018-12-04 |
Current Steering Digital To Analog Converter With Decoder Free Quad Switching
App 20180337685 - Singh; Pratap Narayan ; et al. | 2018-11-22 |
Generic Bit Error Rate Analyzer For Use With Serial Data Links
App 20180285225 - Kumar; Tejinder ; et al. | 2018-10-04 |
Parallel Pipeline Logic Circuit For Generating Crc Values Utilizing Lookup Table
App 20180175883 - Kumar; Tejinder ; et al. | 2018-06-21 |
Generic Width Independent Parallel Checker For A Device Under Test
App 20180164370 - Kumar; Tejinder ; et al. | 2018-06-14 |
Self-calibrated digital-to-analog converter
Grant 9,379,728 - Singh , et al. June 28, 2 | 2016-06-28 |
Adaptive delay based asynchronous successive approximation analog-to-digital converter
Grant 9,300,317 - Malik , et al. March 29, 2 | 2016-03-29 |
Adaptive Delay Based Asynchronous Successive Approximation Analog-to-digital Converter
App 20160056830 - Malik; Rakesh ; et al. | 2016-02-25 |
Adaptive delay based asynchronous successive approximation analog-to-digital converter
Grant 9,258,008 - Singh , et al. February 9, 2 | 2016-02-09 |
Adaptive Delay Based Asynchronous Successive Approximation Analog-to-digital Converter
App 20150280728 - SINGH; Pratap Narayan ; et al. | 2015-10-01 |
Device for implementing a sum of products expression
Grant 7,917,569 - Bhuvanagiri , et al. March 29, 2 | 2011-03-29 |
Scheme for improving settling behavior of gain boosted fully differential operational amplifier
Grant 7,737,780 - Singh , et al. June 15, 2 | 2010-06-15 |
Minimal area integrated circuit implementation of a polyphase interpolation filter using coefficients symmetry
Grant 7,698,355 - Bhuvanagiri , et al. April 13, 2 | 2010-04-13 |
Continuous time common-mode feedback module and method with wide swing and good linearity
Grant 7,671,676 - Singh , et al. March 2, 2 | 2010-03-02 |
Continuous time common mode feedback circuit, system, and method
Grant 7,652,535 - Singh , et al. January 26, 2 | 2010-01-26 |
Scheme for improving settling behavior of gain boosted fully differential operational amplifier
App 20080074190 - Singh; Pratap N. ; et al. | 2008-03-27 |
Continuous time common-mode feedback module and method with wide swing and good linearity
App 20080074189 - Singh; Pratap N. ; et al. | 2008-03-27 |
Continuous time common mode feedback circuit, system, and method
App 20080068083 - Singh; Pratap N. ; et al. | 2008-03-20 |
Device for implementing a sum of products expression
App 20060153321 - Bhuvanagiri; Aditya ; et al. | 2006-07-13 |
Minimal area integrated circuit implementation of a polyphase interpolation filter using coefficients symmetry
App 20060120494 - Bhuvanagiri; Aditya ; et al. | 2006-06-08 |
Area efficient realization of coefficient architecture for bit-serial FIR, IIR filters and combinational/sequential logic structure with zero latency clock output
Grant 7,007,053 - Malik , et al. February 28, 2 | 2006-02-28 |
Area efficient realization of coefficient architecture for bit-serial fir, IIR filters and combinational/sequential logic structure with zero latency clock output
App 20050193046 - Malik, Rakesh ; et al. | 2005-09-01 |
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