MAKOSIEJ; Adam
Patent Applications and Registrations
Patent applications and USPTO patent grants for MAKOSIEJ; Adam.The latest application filed is for "3d memory device comprising sram type memory cells with adjustable back-bias".
- MAKOSIEJ; Adam - Grenoble Cedex 09 FR
- Makosiej; Adam - Grenoble FR
- Makosiej; Adam - Paris FR
| Patent | Date |
|---|---|
| 3d Memory Device Comprising Sram Type Memory Cells With Adjustable Back-bias App 20210167072 - MAKOSIEJ; Adam ; et al. | 2021-06-03 |
| 3D SRAM/ROM with several superimposed layers and reconfigurable by transistor rear biasing Grant 10,923,191 - Coriat , et al. February 16, 2 | 2021-02-16 |
| Memory circuit Grant 10,910,040 - Noel , et al. February 2, 2 | 2021-02-02 |
| SRAM/ROM memory reconfigurable by supply connections Grant 10,861,520 - Makosiej , et al. December 8, 2 | 2020-12-08 |
| In memory computing (IMC) memory circuit having 6T cells Grant 10,839,906 - Makosiej November 17, 2 | 2020-11-17 |
| SRAM memory with improved end-of-read triggering Grant 10,748,604 - Makosiej , et al. A | 2020-08-18 |
| PVT detection circuit Grant 10,685,700 - Royer , et al. | 2020-06-16 |
| 3d Integrated Circuit Random-access Memory App 20200185392 - MAKOSIEJ; Adam ; et al. | 2020-06-11 |
| In Memory Computing (imc) Memory Circuit Having 6t Cells App 20200126620 - MAKOSIEJ; Adam | 2020-04-23 |
| Sram/rom Memory Reconfigurable By Substrate Polarization App 20200035302 - CORIAT; David ; et al. | 2020-01-30 |
| Sram/rom Memory Reconfigurable By Supply Connections App 20200020373 - MAKOSIEJ; Adam ; et al. | 2020-01-16 |
| Sram Memory With Improved End-of-read Riggering App 20190228820 - Makosiej; Adam ; et al. | 2019-07-25 |
| Pvt Detection Circuit App 20190198092 - Royer; Pablo ; et al. | 2019-06-27 |
| Memory Circuit App 20190198094 - Noel; Jean-Philippe ; et al. | 2019-06-27 |
| Cam Memory Cell App 20190080761 - MAKOSIEJ; Adam ; et al. | 2019-03-14 |
| Tri-state inverter, D latch and master-slave flip-flop comprising TFETs Grant 10,110,203 - Gupta , et al. October 23, 2 | 2018-10-23 |
| Refresh-free Tfet Memory Latch App 20180268890 - Gupta; Navneet ; et al. | 2018-09-20 |
| SRAM memory bit cell comprising n-TFET and p-TFET Grant 10,079,056 - Gupta , et al. September 18, 2 | 2018-09-18 |
| Tri-state Inverter, D Latch And Master-slave Flip-flop Comprising Tfets App 20170264275 - GUPTA; Navneet ; et al. | 2017-09-14 |
| Sram Memory Bit Cell Comprising N-tfet And P-tfet App 20170263308 - GUPTA; Navneet ; et al. | 2017-09-14 |
| Memory cell with read transistors of the TFET and MOSFET type to reduce leakage current Grant 9,685,222 - Thomas , et al. June 20, 2 | 2017-06-20 |
| Reconfigurable cam Grant 9,679,649 - Gupta , et al. June 13, 2 | 2017-06-13 |
| Reconfigurable Cam App 20170133092 - Gupta; Navneet ; et al. | 2017-05-11 |
| Memory Cell With Read Transistors Of The Tfet And Mosfettype To Reduce Leakage Current App 20170110179 - THOMAS; Olivier ; et al. | 2017-04-20 |
| Device with SRAM memory cells including means for polarizing wells of memory cell transistors Grant 9,542,996 - Thomas , et al. January 10, 2 | 2017-01-10 |
| Programmable-resistance non-volatile memory Grant 9,508,434 - Benoist , et al. November 29, 2 | 2016-11-29 |
| Memory Device With Memory Cells Sram (static Random Access Memories) And Controlling The Polarization Of Boxes Of Transistors Of The Memory Cells App 20160078924 - THOMAS; Olivier ; et al. | 2016-03-17 |
| Tunnel effect transistor Grant 9,252,269 - Anghel , et al. February 2, 2 | 2016-02-02 |
| Memoire Non Volatile A Resistance Programmable App 20160027509 - BENOIST; Thomas-Medhi ; et al. | 2016-01-28 |
| Circuit for reverse biasing inverters for reducing the power consumption of an SRAM memory Grant 9,099,993 - Thomas , et al. August 4, 2 | 2015-08-04 |
| Circuit For Reverse Biasing Inverters For Reducing The Power Consumption Of An Sram Memory App 20140334226 - Thomas; Olivier ; et al. | 2014-11-13 |
| Tunnel Effect Transistor App 20140252407 - Anghel; Costin ; et al. | 2014-09-11 |
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