Mahurin; Eric W.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Mahurin; Eric W..The latest application filed is for "processor to perform a bit range isolation instruction".

Company Profile

4.22.10

Mahurin; Eric W. - Austin TX
Mahurin; Eric W - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Processor to perform a bit range isolation instruction Grant 10,656,947 - Loktyukhin , et al.	2020-05-19
Processor to perform a bit range isolation instruction Grant 10,579,379 - Loktyukhin , et al.	2020-03-03
System-on-chip (SoC) to perform a bit range isolation instruction Grant 10,579,380 - Loktyukhin , et al.	2020-03-03
Hand held device to perform a bit range isolation instruction Grant 10,372,455 - Loktyukhin , et al.	2019-08-06
Processor To Perform A Bit Range Isolation Instruction App 20180203698 - Loktyukhin; Maxim ; et al.	2018-07-19
Functional unit for vector leading zeroes, vector trailing zeroes, vector operand 1s count and vector parity calculation Grant 9,092,213 - Wiedemeier , et al. July 28, 2	2015-07-28
Hand Held Device To Perform A Bit Range Isolation Instruction App 20150143084 - Loktyukhin; Maxim ; et al.	2015-05-21
Reducing power consumption and resource utilization during miss lookahead Grant 9,009,449 - Chou , et al. April 14, 2	2015-04-14
SYSTEM-ON-CHIP (SoC) TO PERFORM A BIT RANGE ISOLATION INSTRUCTION App 20150100761 - Loktyukhin; Maxim ; et al.	2015-04-09
Processor To Perform A Bit Range Isolation Instruction App 20150100760 - Loktyukhin; Maxim ; et al.	2015-04-09
Bit range isolation instructions, methods, and apparatus Grant 9,003,170 - Loktyukhin , et al. April 7, 2	2015-04-07
Prefetching load data in lookahead mode and invalidating architectural registers instead of writing results for retiring instructions Grant 8,918,626 - Chou , et al. December 23, 2	2014-12-23
Reducing Power Consumption And Resource Utilization During Miss Lookahead App 20130124829 - Chou; Yuan C. ; et al.	2013-05-16
Reducing Hardware Costs For Supporting Miss Lookahead App 20130124828 - Chou; Yuan C. ; et al.	2013-05-16
FUNCTIONAL UNIT FOR VECTOR LEADING ZEROES, VECTOR TRAILING ZEROES, VECTOR OPERAND 1s COUNT AND VECTOR PARITY CALCULATION App 20120079253 - Wiedemeier; Jeff ; et al.	2012-03-29
Bit Range Isolation Instructions, Methods, and Apparatus App 20110153997 - Loktyukhin; Maxim ; et al.	2011-06-23
Integrated circuit design with cell-based macros Grant 7,401,310 - Thaden , et al. July 15, 2	2008-07-15
Circuit for parity tree structure Grant 7,242,219 - Mahurin , et al. July 10, 2	2007-07-10
Instruction decode unit producing instruction operand information in the order in which the operands are identified, and systems including same Grant 6,539,470 - Mahurin , et al. March 25, 2	2003-03-25
Detecting full conditions in a queue Grant 6,460,130 - Trull , et al. October 1, 2	2002-10-01
Method and circuitry for an undisturbed scannable state element Grant 6,380,724 - Mahurin , et al. April 30, 2	2002-04-30
Programming paradigm and microprocessor architecture for exact branch targeting Grant 6,243,805 - Mahurin June 5, 2	2001-06-05
Method and circuit for determining leading or trailing zero count Grant 6,173,300 - Mahurin January 9, 2	2001-01-09
Circuit and method for determining overflow in signed division Grant 6,094,669 - Mahurin July 25, 2	2000-07-25
Method and circuit for performing a shift arithmetic right operation Grant 6,035,310 - Mahurin March 7, 2	2000-03-07
Circuit and method for shifting or rotating operands of multiple size Grant 5,991,786 - Mahurin November 23, 1	1999-11-23

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